^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AHCI SATA platform library
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2004-2005 Red Hat, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jeff Garzik <jgarzik@pobox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright 2010 MontaVista Software, LLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Anton Vorontsov <avorontsov@ru.mvista.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/ahci_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "ahci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static void ahci_host_stop(struct ata_host *host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct ata_port_operations ahci_platform_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .inherits = &ahci_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .host_stop = ahci_host_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) EXPORT_SYMBOL_GPL(ahci_platform_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * ahci_platform_enable_phys - Enable PHYs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * This function enables all the PHYs found in hpriv->phys, if any.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * If a PHY fails to be enabled, it disables all the PHYs already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * enabled in reverse order and returns an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) for (i = 0; i < hpriv->nports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) rc = phy_init(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) goto disable_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) phy_exit(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) goto disable_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) rc = phy_power_on(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (rc && !(rc == -EOPNOTSUPP && (hpriv->flags & AHCI_HFLAG_IGN_NOTSUPP_POWER_ON))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) phy_exit(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) goto disable_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) disable_phys:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) while (--i >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) phy_power_off(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) phy_exit(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) EXPORT_SYMBOL_GPL(ahci_platform_enable_phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * ahci_platform_disable_phys - Disable PHYs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * This function disables all PHYs found in hpriv->phys.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) for (i = 0; i < hpriv->nports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) phy_power_off(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) phy_exit(hpriv->phys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) EXPORT_SYMBOL_GPL(ahci_platform_disable_phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * ahci_platform_enable_clks - Enable platform clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * This function enables all the clks found in hpriv->clks, starting at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * index 0. If any clk fails to enable it disables all the clks already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * enabled in reverse order, and then returns an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int c, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) rc = clk_prepare_enable(hpriv->clks[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) goto disable_unprepare_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) disable_unprepare_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) while (--c >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) clk_disable_unprepare(hpriv->clks[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * ahci_platform_disable_clks - Disable platform clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * This function disables all the clks found in hpriv->clks, in reverse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * order of ahci_platform_enable_clks (starting at the end of the array).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (hpriv->clks[c])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) clk_disable_unprepare(hpriv->clks[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * ahci_platform_enable_regulators - Enable regulators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * This function enables all the regulators found in controller and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * disables all the regulators already enabled in reverse order and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * returns an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) rc = regulator_enable(hpriv->ahci_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) rc = regulator_enable(hpriv->phy_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) goto disable_ahci_pwrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) for (i = 0; i < hpriv->nports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (!hpriv->target_pwrs[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) rc = regulator_enable(hpriv->target_pwrs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) goto disable_target_pwrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) disable_target_pwrs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) while (--i >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (hpriv->target_pwrs[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) regulator_disable(hpriv->target_pwrs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) regulator_disable(hpriv->phy_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) disable_ahci_pwrs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) regulator_disable(hpriv->ahci_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * ahci_platform_disable_regulators - Disable regulators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * This function disables all regulators found in hpriv->target_pwrs and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * AHCI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) for (i = 0; i < hpriv->nports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (!hpriv->target_pwrs[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) regulator_disable(hpriv->target_pwrs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) regulator_disable(hpriv->ahci_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) regulator_disable(hpriv->phy_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * ahci_platform_enable_resources - Enable platform resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * This function enables all ahci_platform managed resources in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * following order:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * 1) Regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * 2) Clocks (through ahci_platform_enable_clks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * 3) Resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * 4) Phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * If resource enabling fails at any point the previous enabled resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * are disabled in reverse order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) rc = ahci_platform_enable_regulators(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) rc = ahci_platform_enable_clks(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) goto disable_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) rc = reset_control_deassert(hpriv->rsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) goto disable_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) rc = ahci_platform_enable_phys(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) goto disable_resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) disable_resets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) reset_control_assert(hpriv->rsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) disable_clks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ahci_platform_disable_clks(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) disable_regulator:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ahci_platform_disable_regulators(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * ahci_platform_disable_resources - Disable platform resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * @hpriv: host private area to store config values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * This function disables all ahci_platform managed resources in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * following order:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * 1) Phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * 2) Resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * 3) Clocks (through ahci_platform_disable_clks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * 4) Regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ahci_platform_disable_phys(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) reset_control_assert(hpriv->rsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ahci_platform_disable_clks(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ahci_platform_disable_regulators(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static void ahci_platform_put_resources(struct device *dev, void *res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct ahci_host_priv *hpriv = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (hpriv->got_runtime_pm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) pm_runtime_put_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) clk_put(hpriv->clks[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * The regulators are tied to child node device and not to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * SATA device itself. So we can't use devm for automatically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * releasing them. We have to do it manually here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) for (c = 0; c < hpriv->nports; c++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (hpriv->target_pwrs && hpriv->target_pwrs[c])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) regulator_put(hpriv->target_pwrs[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) kfree(hpriv->target_pwrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct device *dev, struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (!IS_ERR(hpriv->phys[port]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) rc = PTR_ERR(hpriv->phys[port]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) switch (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) case -ENOSYS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* No PHY support. Check if PHY is required. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (of_find_property(node, "phys", NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) "couldn't get PHY in node %pOFn: ENOSYS\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case -ENODEV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* continue normally */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) hpriv->phys[port] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) case -EPROBE_DEFER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* Do not complain yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) "couldn't get PHY in node %pOFn: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) node, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct regulator *target_pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) target_pwr = regulator_get(dev, "target");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (!IS_ERR(target_pwr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) hpriv->target_pwrs[port] = target_pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) rc = PTR_ERR(target_pwr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * ahci_platform_get_resources - Get platform resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * @pdev: platform device to get resources for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * @flags: bitmap representing the resource to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * This function allocates an ahci_host_priv struct, and gets the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * resources, storing a reference to them inside the returned struct:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * 2) regulator for controlling the targets power (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * regulator for controlling the AHCI controller (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * or for non devicetree enabled platforms a single clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * 5) phys (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct ahci_host_priv *hpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int i, enabled_ports = 0, rc = -ENOMEM, child_nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u32 mask_port_map = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (!devres_open_group(dev, NULL, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (!hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) devres_add(dev, hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) hpriv->mmio = devm_ioremap_resource(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) platform_get_resource(pdev, IORESOURCE_MEM, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (IS_ERR(hpriv->mmio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) rc = PTR_ERR(hpriv->mmio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) for (i = 0; i < AHCI_MAX_CLKS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * For now we must use clk_get(dev, NULL) for the first clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * because some platforms (da850, spear13xx) are not yet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * converted to use devicetree for clocks. For new platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * this is equivalent to of_clk_get(dev->of_node, 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) clk = clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) clk = of_clk_get(dev->of_node, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) rc = PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (rc == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) hpriv->clks[i] = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (IS_ERR(hpriv->ahci_regulator)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) rc = PTR_ERR(hpriv->ahci_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (rc != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) hpriv->phy_regulator = devm_regulator_get(dev, "phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (IS_ERR(hpriv->phy_regulator)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) rc = PTR_ERR(hpriv->phy_regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (flags & AHCI_PLATFORM_GET_RESETS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (IS_ERR(hpriv->rsts)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) rc = PTR_ERR(hpriv->rsts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * If no sub-node was found, we still need to set nports to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * one in order to be able to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * ahci_platform_[en|dis]able_[phys|regulators] functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!child_nodes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) hpriv->nports = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (!hpriv->phys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * We cannot use devm_ here, since ahci_platform_put_resources() uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * target_pwrs after devm_ have freed memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (!hpriv->target_pwrs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (child_nodes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) for_each_child_of_node(dev->of_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) u32 port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct platform_device *port_dev __maybe_unused;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (!of_device_is_available(child))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (of_property_read_u32(child, "reg", &port)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (port >= hpriv->nports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) dev_warn(dev, "invalid port number %d\n", port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) mask_port_map |= BIT(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #ifdef CONFIG_OF_ADDRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) of_platform_device_create(child, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) port_dev = of_find_device_by_node(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (port_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) rc = ahci_platform_get_regulator(hpriv, port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) &port_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (rc == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) rc = ahci_platform_get_phy(hpriv, port, dev, child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) enabled_ports++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (!enabled_ports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) dev_warn(dev, "No port enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (!hpriv->mask_port_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) hpriv->mask_port_map = mask_port_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * If no sub-node was found, keep this for device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * compatibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) rc = ahci_platform_get_regulator(hpriv, 0, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (rc == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) hpriv->got_runtime_pm = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) devres_remove_group(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return hpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) devres_release_group(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return ERR_PTR(rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) * ahci_platform_init_host - Bring up an ahci-platform host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * @pdev: platform device pointer for the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * @hpriv: ahci-host private data for the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * @pi_template: template for the ata_port_info to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * @sht: scsi_host_template to use when registering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * This function does all the usual steps needed to bring up an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * must be initialized / enabled before calling this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) int ahci_platform_init_host(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) struct ahci_host_priv *hpriv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) const struct ata_port_info *pi_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) struct scsi_host_template *sht)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct ata_port_info pi = *pi_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) const struct ata_port_info *ppi[] = { &pi, NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct ata_host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) int i, irq, n_ports, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (irq != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) dev_err(dev, "no irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (!irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) hpriv->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* prepare host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) pi.private_data = (void *)(unsigned long)hpriv->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) ahci_save_initial_config(dev, hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (hpriv->cap & HOST_CAP_NCQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) pi.flags |= ATA_FLAG_NCQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (hpriv->cap & HOST_CAP_PMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) pi.flags |= ATA_FLAG_PMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ahci_set_em_messages(hpriv, &pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* CAP.NP sometimes indicate the index of the last enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * port, at other times, that of the last possible port, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * determining the maximum port number requires looking at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * both CAP.NP and port_map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) host = ata_host_alloc_pinfo(dev, ppi, n_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (!host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) host->private_data = hpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) host->flags |= ATA_HOST_PARALLEL_SCAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (pi.flags & ATA_FLAG_EM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) ahci_reset_em(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) for (i = 0; i < host->n_ports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) struct ata_port *ap = host->ports[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ata_port_desc(ap, "mmio %pR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) platform_get_resource(pdev, IORESOURCE_MEM, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) /* set enclosure management message type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (ap->flags & ATA_FLAG_EM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ap->em_message_type = hpriv->em_msg_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) /* disabled/not-implemented port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (!(hpriv->port_map & (1 << i)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ap->ops = &ata_dummy_port_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (hpriv->cap & HOST_CAP_64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) rc = dma_coerce_mask_and_coherent(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dev_err(dev, "Failed to enable 64-bit DMA.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) rc = ahci_reset_controller(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ahci_init_controller(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ahci_print_info(host, "platform");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return ahci_host_activate(host, sht);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) EXPORT_SYMBOL_GPL(ahci_platform_init_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static void ahci_host_stop(struct ata_host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) * @pdev: platform device pointer for the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * This function is called during system shutdown and performs the minimal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * deconfiguration required to ensure that an ahci_platform host cannot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * corrupt or otherwise interfere with a new kernel being started with kexec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) void ahci_platform_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct ata_host *host = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) void __iomem *mmio = hpriv->mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) for (i = 0; i < host->n_ports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) struct ata_port *ap = host->ports[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) /* Disable port interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (ap->ops->freeze)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ap->ops->freeze(ap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /* Stop the port DMA engines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (ap->ops->port_stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) ap->ops->port_stop(ap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* Disable and clear host interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) readl(mmio + HOST_CTL); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * ahci_platform_suspend_host - Suspend an ahci-platform host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * @dev: device pointer for the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) * This function does all the usual steps needed to suspend an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) * must be disabled after calling this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) int ahci_platform_suspend_host(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) void __iomem *mmio = hpriv->mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) u32 ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) dev_err(dev, "firmware update required for suspend/resume\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * AHCI spec rev1.1 section 8.3.3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * Software must disable interrupts prior to requesting a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * transition of the HBA to D3 state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) ctl = readl(mmio + HOST_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ctl &= ~HOST_IRQ_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) writel(ctl, mmio + HOST_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) readl(mmio + HOST_CTL); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) ahci_platform_disable_phys(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return ata_host_suspend(host, PMSG_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * ahci_platform_resume_host - Resume an ahci-platform host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * @dev: device pointer for the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * This function does all the usual steps needed to resume an ahci-platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * host, note any necessary resources (ie clks, phys, etc.) must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * initialized / enabled before calling this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) int ahci_platform_resume_host(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) rc = ahci_reset_controller(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) ahci_init_controller(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ahci_platform_enable_phys(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) ata_host_resume(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * ahci_platform_suspend - Suspend an ahci-platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * @dev: the platform device to suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * This function suspends the host associated with the device, followed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * disabling all the resources of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) int ahci_platform_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) rc = ahci_platform_suspend_host(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) EXPORT_SYMBOL_GPL(ahci_platform_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) * ahci_platform_resume - Resume an ahci-platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) * @dev: the platform device to resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) * This function enables all the resources of the device followed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * resuming the host associated with the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) * RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) * 0 on success otherwise a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) int ahci_platform_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) rc = ahci_platform_enable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) rc = ahci_platform_resume_host(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) goto disable_resources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) /* We resumed so update PM runtime state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) disable_resources:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) EXPORT_SYMBOL_GPL(ahci_platform_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) MODULE_DESCRIPTION("AHCI SATA platform library");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags