Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2012 STMicroelectronics Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Authors: Francesco Virlinzi <francesco.virlinzi@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	    Alexandre Torgue <alexandre.torgue@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/ahci_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include "ahci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define DRV_NAME  "st_ahci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ST_AHCI_OOBR			0xbc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ST_AHCI_OOBR_WE			BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ST_AHCI_OOBR_CWMIN_SHIFT	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ST_AHCI_OOBR_CWMAX_SHIFT	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ST_AHCI_OOBR_CIMIN_SHIFT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define ST_AHCI_OOBR_CIMAX_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) struct st_ahci_drv_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct platform_device *ahci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct reset_control *pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct reset_control *sw_rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct reset_control *pwr_rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static void st_ahci_configure_oob(void __iomem *mmio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	unsigned long old_val, new_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		  (0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		  (0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		  (0x0C << ST_AHCI_OOBR_CIMAX_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	old_val = readl(mmio + ST_AHCI_OOBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	writel(new_val, mmio + ST_AHCI_OOBR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 				struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct st_ahci_drv_data *drv_data = hpriv->plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (drv_data->pwr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		err = reset_control_deassert(drv_data->pwr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			dev_err(dev, "unable to bring out of pwrdwn\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	if (drv_data->sw_rst) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		err = reset_control_deassert(drv_data->sw_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			dev_err(dev, "unable to bring out of sw-rst\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (drv_data->pwr_rst) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		err = reset_control_deassert(drv_data->pwr_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			dev_err(dev, "unable to bring out of pwr-rst\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static void st_ahci_host_stop(struct ata_host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct st_ahci_drv_data *drv_data = hpriv->plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct device *dev = host->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (drv_data->pwr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		err = reset_control_assert(drv_data->pwr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			dev_err(dev, "unable to pwrdwn\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct st_ahci_drv_data *drv_data = hpriv->plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (IS_ERR(drv_data->pwr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		dev_info(dev, "power reset control not defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		drv_data->pwr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (IS_ERR(drv_data->sw_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		dev_info(dev, "soft reset control not defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		drv_data->sw_rst = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (IS_ERR(drv_data->pwr_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		dev_dbg(dev, "power soft reset control not defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		drv_data->pwr_rst = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	return st_ahci_deassert_resets(hpriv, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static struct ata_port_operations st_ahci_port_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.inherits	= &ahci_platform_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.host_stop	= st_ahci_host_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const struct ata_port_info st_ahci_port_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.flags          = AHCI_FLAG_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.pio_mask       = ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.udma_mask      = ATA_UDMA6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.port_ops       = &st_ahci_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static struct scsi_host_template ahci_platform_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	AHCI_SHT(DRV_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int st_ahci_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct st_ahci_drv_data *drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	struct ahci_host_priv *hpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (!drv_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	hpriv = ahci_platform_get_resources(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (IS_ERR(hpriv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		return PTR_ERR(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	hpriv->plat_data = drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	err = st_ahci_probe_resets(hpriv, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	err = ahci_platform_enable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	st_ahci_configure_oob(hpriv->mmio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	of_property_read_u32(dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			     "ports-implemented", &hpriv->force_port_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				      &ahci_platform_sht);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int st_ahci_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct st_ahci_drv_data *drv_data = hpriv->plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	err = ahci_platform_suspend_host(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (drv_data->pwr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		err = reset_control_assert(drv_data->pwr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 			dev_err(dev, "unable to pwrdwn");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int st_ahci_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct ata_host *host = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct ahci_host_priv *hpriv = host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	err = ahci_platform_enable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	err = st_ahci_deassert_resets(hpriv, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	st_ahci_configure_oob(hpriv->mmio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	return ahci_platform_resume_host(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const struct of_device_id st_ahci_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	{ .compatible = "st,ahci", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) MODULE_DEVICE_TABLE(of, st_ahci_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static struct platform_driver st_ahci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		.name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		.pm = &st_ahci_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		.of_match_table = of_match_ptr(st_ahci_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.probe = st_ahci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.remove = ata_platform_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) module_platform_driver(st_ahci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MODULE_AUTHOR("Francesco Virlinzi <francesco.virlinzi@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MODULE_LICENSE("GPL v2");