^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AMD Seattle AHCI SATA driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015, Advanced Micro Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Brijesh Singh <brijesh.singh@amd.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/ahci_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pci_ids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "ahci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* SGPIO Control Register definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Bit Type Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * 31 RW OD7.2 (activity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 30 RW OD7.1 (locate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 29 RW OD7.0 (fault)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 28...8 RW OD6.2...OD0.0 (3bits per port, 1 bit per LED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * 7 RO SGPIO feature flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 6:4 RO Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 3:0 RO Number of ports (0 means no port supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ACTIVITY_BIT_POS(x) (8 + (3 * x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LOCATE_BIT_POS(x) (ACTIVITY_BIT_POS(x) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define FAULT_BIT_POS(x) (LOCATE_BIT_POS(x) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ACTIVITY_MASK 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LOCATE_MASK 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define FAULT_MASK 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DRV_NAME "ahci-seattle"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ssize_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct seattle_plat_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void __iomem *sgpio_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct ata_port_operations ahci_port_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .inherits = &ahci_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct ata_port_info ahci_port_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .flags = AHCI_FLAG_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .pio_mask = ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .udma_mask = ATA_UDMA6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .port_ops = &ahci_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static struct ata_port_operations ahci_seattle_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .inherits = &ahci_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .transmit_led_message = seattle_transmit_led_message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const struct ata_port_info ahci_port_seattle_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .flags = AHCI_FLAG_COMMON | ATA_FLAG_EM | ATA_FLAG_SW_ACTIVITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .link_flags = ATA_LFLAG_SW_ACTIVITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .pio_mask = ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .udma_mask = ATA_UDMA6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .port_ops = &ahci_seattle_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static struct scsi_host_template ahci_platform_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) AHCI_SHT(DRV_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ssize_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct ahci_host_priv *hpriv = ap->host->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct ahci_port_priv *pp = ap->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct seattle_plat_data *plat_data = hpriv->plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int pmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct ahci_em_priv *emp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* get the slot number from the message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (pmp >= EM_MAX_SLOTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) emp = &pp->em_priv[pmp];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) val = ioread32(plat_data->sgpio_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (state & ACTIVITY_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) val |= 1 << ACTIVITY_BIT_POS((ap->port_no));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) val &= ~(1 << ACTIVITY_BIT_POS((ap->port_no)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (state & LOCATE_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) val |= 1 << LOCATE_BIT_POS((ap->port_no));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) val &= ~(1 << LOCATE_BIT_POS((ap->port_no)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (state & FAULT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) val |= 1 << FAULT_BIT_POS((ap->port_no));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) val &= ~(1 << FAULT_BIT_POS((ap->port_no)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) iowrite32(val, plat_data->sgpio_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) spin_lock_irqsave(ap->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* save off new led state for port/slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) emp->led_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) spin_unlock_irqrestore(ap->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const struct ata_port_info *ahci_seattle_get_port_info(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct platform_device *pdev, struct ahci_host_priv *hpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct seattle_plat_data *plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (!plat_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return &ahci_port_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) plat_data->sgpio_ctrl = devm_ioremap_resource(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) platform_get_resource(pdev, IORESOURCE_MEM, 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (IS_ERR(plat_data->sgpio_ctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return &ahci_port_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) val = ioread32(plat_data->sgpio_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (!(val & 0xf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return &ahci_port_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) hpriv->em_loc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) hpriv->em_buf_sz = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) hpriv->em_msg_type = EM_MSG_TYPE_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) hpriv->plat_data = plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_info(dev, "SGPIO LED control is enabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return &ahci_port_seattle_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int ahci_seattle_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct ahci_host_priv *hpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) hpriv = ahci_platform_get_resources(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (IS_ERR(hpriv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return PTR_ERR(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) rc = ahci_platform_enable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) rc = ahci_platform_init_host(pdev, hpriv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ahci_seattle_get_port_info(pdev, hpriv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) &ahci_platform_sht);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) goto disable_resources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) disable_resources:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ahci_platform_disable_resources(hpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ahci_platform_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct acpi_device_id ahci_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { "AMDI0600", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static struct platform_driver ahci_seattle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .probe = ahci_seattle_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .remove = ata_platform_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .acpi_match_table = ahci_acpi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .pm = &ahci_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) module_platform_driver(ahci_seattle_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_DESCRIPTION("Seattle AHCI SATA platform driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_AUTHOR("Brijesh Singh <brijesh.singh@amd.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MODULE_ALIAS("platform:" DRV_NAME);