^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * SATA glue for Cavium Octeon III SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2010-2015 Cavium Networks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/octeon/octeon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CVMX_SATA_UCTL_SHIM_CFG 0xE8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SATA_UCTL_ENDIAN_MODE_BIG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SATA_UCTL_ENDIAN_MODE_LITTLE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SATA_UCTL_ENDIAN_MODE_MASK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SATA_UCTL_DMA_READ_CMD_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int ahci_octeon_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct device_node *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u64 cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (IS_ERR(base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return PTR_ERR(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (!node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dev_err(dev, "no device node, failed to add octeon sata\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = of_platform_populate(node, NULL, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dev_err(dev, "failed to add ahci-platform core\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int ahci_octeon_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static const struct of_device_id octeon_ahci_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { .compatible = "cavium,octeon-7130-sata-uctl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MODULE_DEVICE_TABLE(of, octeon_ahci_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static struct platform_driver ahci_octeon_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .probe = ahci_octeon_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .remove = ahci_octeon_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .name = "octeon-ahci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .of_match_table = octeon_ahci_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) module_platform_driver(ahci_octeon_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MODULE_DESCRIPTION("Cavium Inc. sata config.");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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