Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/pci-acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/dmar.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/platform_data/x86/apple.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <acpi/apei.h>	/* for acpi_hest_init() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include "internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ACPI_PCI_ROOT_CLASS		"pci_bridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ACPI_PCI_ROOT_DEVICE_NAME	"PCI Root Bridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static int acpi_pci_root_add(struct acpi_device *device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 			     const struct acpi_device_id *not_used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static void acpi_pci_root_remove(struct acpi_device *device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	acpiphp_check_host_bridge(adev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 				| OSC_PCI_ASPM_SUPPORT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 				| OSC_PCI_CLOCK_PM_SUPPORT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 				| OSC_PCI_MSI_SUPPORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) static const struct acpi_device_id root_device_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	{"PNP0A03", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	{"", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static struct acpi_scan_handler pci_root_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.ids = root_device_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.attach = acpi_pci_root_add,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.detach = acpi_pci_root_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.hotplug = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.enabled = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.scan_dependent = acpi_pci_root_scan_dependent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static DEFINE_MUTEX(osc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * @handle:  the ACPI CA node in question.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * Note: we could make this API take a struct acpi_device * instead, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * for now, it's more convenient to operate on an acpi_handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) int acpi_is_root_bridge(acpi_handle handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct acpi_device *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	ret = acpi_bus_get_device(handle, &device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	ret = acpi_match_device_ids(device, root_device_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct resource *res = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct acpi_resource_address64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	status = acpi_resource_to_address64(resource, &address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (ACPI_FAILURE(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return AE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if ((address.address.address_length > 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	    (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		res->start = address.address.minimum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		res->end = address.address.minimum + address.address.address_length - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return AE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 					     struct resource *res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	res->start = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	    acpi_walk_resources(handle, METHOD_NAME__CRS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 				get_root_bridge_busnr_callback, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (ACPI_FAILURE(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (res->start == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		return AE_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	return AE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct pci_osc_bit_struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	u32 bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	char *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct pci_osc_bit_struct pci_osc_support_bit[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	{ OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	{ OSC_PCI_ASPM_SUPPORT, "ASPM" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	{ OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	{ OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ OSC_PCI_MSI_SUPPORT, "MSI" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ OSC_PCI_EDR_SUPPORT, "EDR" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static struct pci_osc_bit_struct pci_osc_control_bit[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	{ OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	{ OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{ OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	{ OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	{ OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	{ OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	{ OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			    struct pci_osc_bit_struct *table, int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	char buf[80];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	int i, len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct pci_osc_bit_struct *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	buf[0] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	for (i = 0, entry = table; i < size; i++, entry++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		if (word & entry->bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 					len ? " " : "", entry->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	decode_osc_bits(root, msg, word, pci_osc_support_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			ARRAY_SIZE(pci_osc_support_bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	decode_osc_bits(root, msg, word, pci_osc_control_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			ARRAY_SIZE(pci_osc_control_bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static acpi_status acpi_pci_run_osc(acpi_handle handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				    const u32 *capbuf, u32 *retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct acpi_osc_context context = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		.uuid_str = pci_osc_uuid_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		.rev = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		.cap.length = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		.cap.pointer = (void *)capbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	status = acpi_run_osc(handle, &context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		*retval = *((u32 *)(context.ret.pointer + 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		kfree(context.ret.pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 					u32 support,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 					u32 *control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	u32 result, capbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	support &= OSC_PCI_SUPPORT_MASKS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	support |= root->osc_support_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	capbuf[OSC_SUPPORT_DWORD] = support;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (control) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		*control &= OSC_PCI_CONTROL_MASKS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		/* Run _OSC query only with existing controls. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		root->osc_support_set = support;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		if (control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			*control = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	mutex_lock(&osc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	status = acpi_pci_query_osc(root, flags, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	mutex_unlock(&osc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	struct acpi_pci_root *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	struct acpi_device *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (acpi_bus_get_device(handle, &device) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	    acpi_match_device_ids(device, root_device_ids))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	root = acpi_driver_data(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) EXPORT_SYMBOL_GPL(acpi_pci_find_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct acpi_handle_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	acpi_handle handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)  * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)  * @handle: the handle in question
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)  * Given an ACPI CA handle, the desired PCI device is located in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)  * list of PCI devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)  * If the device is found, its reference count is increased and this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)  * function returns a pointer to its data structure.  The caller must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)  * decrement the reference count by calling pci_dev_put().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)  * If no device is found, %NULL is returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	int dev, fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	unsigned long long adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	acpi_handle phandle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	struct pci_bus *pbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct pci_dev *pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	struct acpi_handle_node *node, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	struct acpi_pci_root *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	LIST_HEAD(device_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	phandle = handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	while (!acpi_is_root_bridge(phandle)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		INIT_LIST_HEAD(&node->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		node->handle = phandle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		list_add(&node->node, &device_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		status = acpi_get_parent(phandle, &phandle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		if (ACPI_FAILURE(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	root = acpi_pci_find_root(phandle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (!root)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	pbus = root->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	 * Now, walk back down the PCI device tree until we return to our
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	 * original handle. Assumes that everything between the PCI root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	 * bridge and the device we're looking for must be a P2P bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	list_for_each_entry(node, &device_list, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		acpi_handle hnd = node->handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		if (ACPI_FAILURE(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		dev = (adr >> 16) & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		fn  = adr & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		if (!pdev || hnd == handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		pbus = pdev->subordinate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		 * This function may be called for a non-PCI device that has a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		 * PCI parent (eg. a disk under a PCI SATA controller).  In that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		 * case pdev->subordinate will be NULL for the parent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		if (!pbus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	list_for_each_entry_safe(node, tmp, &device_list, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		kfree(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	return pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)  * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)  * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)  * @mask: Mask of _OSC bits to request control of, place to store control mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)  * @req: Mask of _OSC bits the control of is essential to the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)  * Run _OSC query for @mask and if that is successful, compare the returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)  * mask of control bits with @req.  If all of the @req bits are set in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)  * returned mask, run _OSC request for it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)  * The variable at the @mask address may be modified regardless of whether or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)  * not the function returns success.  On success it will contain the mask of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)  * _OSC bits the BIOS has granted control of, but its contents are meaningless
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)  * on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)  **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	struct acpi_pci_root *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	acpi_status status = AE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	u32 ctrl, capbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	if (!mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		return AE_BAD_PARAMETER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	ctrl = *mask & OSC_PCI_CONTROL_MASKS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	if ((ctrl & req) != req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		return AE_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	root = acpi_pci_find_root(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	if (!root)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		return AE_NOT_EXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	mutex_lock(&osc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	*mask = ctrl | root->osc_control_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	/* No need to evaluate _OSC if the control was already granted. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	if ((root->osc_control_set & ctrl) == ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	/* Need to check the available controls bits before requesting them. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	while (*mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		status = acpi_pci_query_osc(root, root->osc_support_set, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		if (ACPI_FAILURE(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		if (ctrl == *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		decode_osc_control(root, "platform does not support",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 				   ctrl & ~(*mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		ctrl = *mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	if ((ctrl & req) != req) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		decode_osc_control(root, "not requesting control; platform does not support",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 				   req & ~(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		status = AE_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	capbuf[OSC_QUERY_DWORD] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	capbuf[OSC_CONTROL_DWORD] = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	status = acpi_pci_run_osc(handle, capbuf, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (ACPI_SUCCESS(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		root->osc_control_set = *mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	mutex_unlock(&osc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) EXPORT_SYMBOL(acpi_pci_osc_control_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 				 bool is_pcie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	u32 support, control, requested;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	struct acpi_device *device = root->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	acpi_handle handle = device->handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	 * Apple always return failure on _OSC calls when _OSI("Darwin") has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	 * been called successfully. We know the feature set supported by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	 * platform, so avoid calling _OSC at all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	if (x86_apple_machine) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		decode_osc_control(root, "OS assumes control of",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 				   root->osc_control_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	 * All supported architectures that use ACPI have support for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	 * PCI domains, so we indicate this in _OSC support capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	if (pci_ext_cfg_avail())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		support |= OSC_PCI_EXT_CONFIG_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	if (pcie_aspm_support_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	if (pci_msi_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		support |= OSC_PCI_MSI_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	if (IS_ENABLED(CONFIG_PCIE_EDR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		support |= OSC_PCI_EDR_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	decode_osc_support(root, "OS supports", support);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	status = acpi_pci_osc_support(root, support);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		*no_aspm = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		/* _OSC is optional for PCI host bridges */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		if ((status == AE_NOT_FOUND) && !is_pcie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 		dev_info(&device->dev, "_OSC failed (%s)%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 			 acpi_format_exception(status),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 			 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	if (pcie_ports_disabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 		decode_osc_support(root, "not requesting OS control; OS requires",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 				   ACPI_PCIE_REQ_SUPPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		| OSC_PCI_EXPRESS_PME_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	if (IS_ENABLED(CONFIG_PCIEASPM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 		control |= OSC_PCI_EXPRESS_LTR_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	if (pci_aer_available())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		control |= OSC_PCI_EXPRESS_AER_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	 * Per the Downstream Port Containment Related Enhancements ECN to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	 * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	 * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	 * and EDR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		control |= OSC_PCI_EXPRESS_DPC_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	requested = control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	status = acpi_pci_osc_control_set(handle, &control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 					  OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		decode_osc_control(root, "OS now controls", control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 		if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 			 * We have ASPM control, but the FADT indicates that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 			 * it's unsupported. Leave existing configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 			 * intact and prevent the OS from touching it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 			*no_aspm = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		decode_osc_control(root, "OS requested", requested);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 		decode_osc_control(root, "platform willing to grant", control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 			acpi_format_exception(status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		 * We want to disable ASPM here, but aspm_disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		 * needs to remain in its state from boot so that we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 		 * properly handle PCIe 1.1 devices.  So we set this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 		 * flag here, to defer the action until after the ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 		 * root scan.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 		*no_aspm = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static int acpi_pci_root_add(struct acpi_device *device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 			     const struct acpi_device_id *not_used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	unsigned long long segment, bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	struct acpi_pci_root *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	acpi_handle handle = device->handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	int no_aspm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	bool hotadd = system_state == SYSTEM_RUNNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	bool is_pcie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	if (!root)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	segment = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 				       &segment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 		dev_err(&device->dev,  "can't evaluate _SEG\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		result = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	/* Check _CRS first, then _BBN.  If no _BBN, default to zero. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	root->secondary.flags = IORESOURCE_BUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	status = try_get_root_bridge_busnr(handle, &root->secondary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 		 * We need both the start and end of the downstream bus range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 		 * to interpret _CBA (MMCONFIG base address), so it really is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 		 * supposed to be in _CRS.  If we don't find it there, all we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 		 * can do is assume [_BBN-0xFF] or [0-0xFF].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 		root->secondary.end = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		dev_warn(&device->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 			 FW_BUG "no secondary bus range in _CRS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 					       NULL, &bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		if (ACPI_SUCCESS(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 			root->secondary.start = bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 		else if (status == AE_NOT_FOUND)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 			root->secondary.start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 		else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 			dev_err(&device->dev, "can't evaluate _BBN\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 			result = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	root->device = device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	root->segment = segment & 0xFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	device->driver_data = root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	if (hotadd && dmar_device_add(handle)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		result = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	       acpi_device_name(device), acpi_device_bid(device),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	       root->segment, &root->secondary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	negotiate_os_control(root, &no_aspm, is_pcie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	 * TBD: Need PCI interface for enumeration/configuration of roots.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	 * Scan the Root Bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	 * --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	 * Must do this prior to any attempt to bind the root device, as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	 * PCI namespace does not get created until this call is made (and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	 * thus the root bridge's pci_dev does not exist).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	root->bus = pci_acpi_scan_root(root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	if (!root->bus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 		dev_err(&device->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 			"Bus %04x:%02x not present in PCI namespace\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 			root->segment, (unsigned int)root->secondary.start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 		device->driver_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 		result = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 		goto remove_dmar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 	if (no_aspm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 		pcie_no_aspm();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	pci_acpi_add_bus_pm_notifier(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	if (hotadd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 		pcibios_resource_survey_bus(root->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 		pci_assign_unassigned_root_bus_resources(root->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 		 * This is only called for the hotadd case. For the boot-time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 		 * case, we need to wait until after PCI initialization in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 		 * order to deal with IOAPICs mapped in on a PCI BAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 		 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 		 * This is currently x86-specific, because acpi_ioapic_add()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 		 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 		 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 		 * (see drivers/acpi/Kconfig).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 		acpi_ioapic_add(root->device->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 	pci_lock_rescan_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 	pci_bus_add_devices(root->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	pci_unlock_rescan_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) remove_dmar:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 	if (hotadd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 		dmar_device_remove(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	kfree(root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 	return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static void acpi_pci_root_remove(struct acpi_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	struct acpi_pci_root *root = acpi_driver_data(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	pci_lock_rescan_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 	pci_stop_root_bus(root->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 	pci_ioapic_remove(root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	device_set_wakeup_capable(root->bus->bridge, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 	pci_acpi_remove_bus_pm_notifier(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 	pci_remove_root_bus(root->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	WARN_ON(acpi_ioapic_remove(root));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	dmar_device_remove(device->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 	pci_unlock_rescan_remove();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	kfree(root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)  * Following code to support acpi_pci_root_create() is copied from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)  * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)  * and ARM64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static void acpi_pci_root_validate_resources(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 					     struct list_head *resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 					     unsigned long type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	LIST_HEAD(list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 	struct resource *res1, *res2, *root = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	struct resource_entry *tmp, *entry, *entry2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 	list_splice_init(resources, &list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 	resource_list_for_each_entry_safe(entry, tmp, &list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 		bool free = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 		resource_size_t end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 		res1 = entry->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 		if (!(res1->flags & type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 			goto next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 		/* Exclude non-addressable range or non-addressable portion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 		end = min(res1->end, root->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 		if (end <= res1->start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 			dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 				 res1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 			free = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 			goto next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 		} else if (res1->end != end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 			dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 				 res1, (unsigned long long)end + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 				 (unsigned long long)res1->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 			res1->end = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 		resource_list_for_each_entry(entry2, resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 			res2 = entry2->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 			if (!(res2->flags & type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 			 * I don't like throwing away windows because then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 			 * our resources no longer match the ACPI _CRS, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 			 * the kernel resource tree doesn't allow overlaps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 			if (resource_overlaps(res1, res2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 				res2->start = min(res1->start, res2->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 				res2->end = max(res1->end, res2->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 				dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 					 res2, res1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 				free = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 				goto next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) next:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 		resource_list_del(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 		if (free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 			resource_list_free_entry(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 			resource_list_add_tail(entry, resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 			struct resource_entry *entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) #ifdef PCI_IOBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 	struct resource *res = entry->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 	resource_size_t cpu_addr = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 	resource_size_t pci_addr = cpu_addr - entry->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 	resource_size_t length = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 	unsigned long port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 	if (pci_register_io_range(fwnode, cpu_addr, length))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 	port = pci_address_to_pio(cpu_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 	if (port == (unsigned long)-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	res->start = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 	res->end = port + length - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 	entry->offset = port - pci_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 	if (pci_remap_iospace(res, cpu_addr) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 	pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 	res->flags |= IORESOURCE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 	struct list_head *list = &info->resources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 	struct acpi_device *device = info->bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 	struct resource_entry *entry, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 	flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 	ret = acpi_dev_get_resources(device, list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 				     acpi_dev_filter_resource_type_cb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 				     (void *)flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 		dev_warn(&device->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) 			 "failed to parse _CRS method, error code %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 	else if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) 		dev_dbg(&device->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) 			"no IO and memory resources present in _CRS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) 		resource_list_for_each_entry_safe(entry, tmp, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) 			if (entry->res->flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 				acpi_pci_root_remap_iospace(&device->fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) 						entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) 			if (entry->res->flags & IORESOURCE_DISABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) 				resource_list_destroy_entry(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 				entry->res->name = info->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 		acpi_pci_root_validate_resources(&device->dev, list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 						 IORESOURCE_MEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 		acpi_pci_root_validate_resources(&device->dev, list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 						 IORESOURCE_IO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) 	struct resource_entry *entry, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) 	struct resource *res, *conflict, *root = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) 	resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) 		res = entry->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) 		if (res->flags & IORESOURCE_MEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) 			root = &iomem_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 		else if (res->flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 			root = &ioport_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) 		 * Some legacy x86 host bridge drivers use iomem_resource and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 		 * ioport_resource as default resource pool, skip it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) 		if (res == root)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) 		conflict = insert_resource_conflict(root, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) 		if (conflict) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) 			dev_info(&info->bridge->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 				 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) 				 res, conflict->name, conflict);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) 			resource_list_destroy_entry(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) 	struct resource_entry *entry, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) 	if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) 	resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) 		res = entry->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) 		if (res->parent &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) 		    (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) 			release_resource(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 		resource_list_destroy_entry(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) 	info->ops->release_info(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) 	struct resource_entry *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) 	resource_list_for_each_entry(entry, &bridge->windows) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) 		res = entry->res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) 		if (res->flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) 			pci_unmap_iospace(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) 		if (res->parent &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) 		    (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) 			release_resource(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) 	__acpi_pci_root_release_info(bridge->release_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) 				     struct acpi_pci_root_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) 				     struct acpi_pci_root_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) 				     void *sysdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) 	int ret, busnum = root->secondary.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) 	struct acpi_device *device = root->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) 	int node = acpi_get_node(device->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) 	struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) 	struct pci_host_bridge *host_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 	union acpi_object *obj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) 	info->root = root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) 	info->bridge = device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) 	info->ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) 	INIT_LIST_HEAD(&info->resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) 	snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) 		 root->segment, busnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) 	if (ops->init_info && ops->init_info(info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) 		goto out_release_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) 	if (ops->prepare_resources)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) 		ret = ops->prepare_resources(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) 		ret = acpi_pci_probe_root_resources(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) 		goto out_release_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) 	pci_acpi_root_add_resources(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) 	pci_add_resource(&info->resources, &root->secondary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) 	bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) 				  sysdata, &info->resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) 	if (!bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) 		goto out_release_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) 	host_bridge = to_pci_host_bridge(bus->bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) 		host_bridge->native_pcie_hotplug = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) 	if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) 		host_bridge->native_shpc_hotplug = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) 		host_bridge->native_aer = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) 		host_bridge->native_pme = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) 		host_bridge->native_ltr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) 		host_bridge->native_dpc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) 	 * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) 	 * exists and returns 0, we must preserve any PCI resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) 	 * assignments made by firmware for this host bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) 	obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) 				DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) 	if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) 		host_bridge->preserve_config = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) 	ACPI_FREE(obj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) 	pci_scan_child_bus(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) 	pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) 				    info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) 	if (node != NUMA_NO_NODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) 		dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) 	return bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) out_release_info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) 	__acpi_pci_root_release_info(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) void __init acpi_pci_root_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) 	acpi_hest_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) 	if (acpi_pci_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) 	pci_acpi_crs_quirks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) 	acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }