^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Module Name: hwregs - Read/write access functions for the various ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * control and status registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <acpi/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "accommon.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "acevents.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define _COMPONENT ACPI_HARDWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ACPI_MODULE_NAME("hwregs")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #if (!ACPI_REDUCED_HARDWARE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* Local Prototypes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) acpi_hw_get_access_bit_width(u64 address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct acpi_generic_address *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u8 max_bit_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) acpi_hw_read_multiple(u32 *value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct acpi_generic_address *register_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct acpi_generic_address *register_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) acpi_hw_write_multiple(u32 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct acpi_generic_address *register_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct acpi_generic_address *register_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif /* !ACPI_REDUCED_HARDWARE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * FUNCTION: acpi_hw_get_access_bit_width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * PARAMETERS: address - GAS register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * reg - GAS register structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * max_bit_width - Max bit_width supported (32 or 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * DESCRIPTION: Obtain optimal access bit width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) acpi_hw_get_access_bit_width(u64 address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct acpi_generic_address *reg, u8 max_bit_width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u8 access_bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * GAS format "register", used by FADT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * 1. Detected if bit_offset is 0 and bit_width is 8/16/32/64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * 2. access_size field is ignored and bit_width field is used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * determining the boundary of the IO accesses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * GAS format "region", used by APEI registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * 1. Detected if bit_offset is not 0 or bit_width is not 8/16/32/64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * 2. access_size field is used for determining the boundary of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * IO accesses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * 3. bit_offset/bit_width fields are used to describe the "region".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Note: This algorithm assumes that the "Address" fields should always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * contain aligned values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!reg->bit_offset && reg->bit_width &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ACPI_IS_ALIGNED(reg->bit_width, 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) access_bit_width = reg->bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) } else if (reg->access_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) access_bit_width = ACPI_ACCESS_BIT_WIDTH(reg->access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) access_bit_width =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ACPI_ROUND_UP_POWER_OF_TWO_8(reg->bit_offset +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg->bit_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (access_bit_width <= 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) access_bit_width = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) while (!ACPI_IS_ALIGNED(address, access_bit_width >> 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) access_bit_width >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Maximum IO port access bit width is 32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) max_bit_width = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Return access width according to the requested maximum access bit width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * as the caller should know the format of the register and may enforce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * a 32-bit accesses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (access_bit_width < max_bit_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return (access_bit_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return (max_bit_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * FUNCTION: acpi_hw_validate_register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * PARAMETERS: reg - GAS register structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * max_bit_width - Max bit_width supported (32 or 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * address - Pointer to where the gas->address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * pointer, Address, space_id, bit_width, and bit_offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) acpi_hw_validate_register(struct acpi_generic_address *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 max_bit_width, u64 *address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u8 access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* Must have a valid pointer to a GAS structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return (AE_BAD_PARAMETER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * Copy the target address. This handles possible alignment issues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * Address must not be null. A null address also indicates an optional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * ACPI register that is not supported, so no error message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ACPI_MOVE_64_TO_64(address, ®->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (!(*address)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return (AE_BAD_ADDRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* Validate the space_ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ACPI_ERROR((AE_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) "Unsupported address space: 0x%X", reg->space_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return (AE_SUPPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Validate the access_width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (reg->access_width > 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ACPI_ERROR((AE_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) "Unsupported register access width: 0x%X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) reg->access_width));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return (AE_SUPPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Validate the bit_width, convert access_width into number of bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) access_width =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) acpi_hw_get_access_bit_width(*address, reg, max_bit_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) bit_width =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (max_bit_width < bit_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ACPI_WARNING((AE_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) "Requested bit width 0x%X is smaller than register bit width 0x%X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) max_bit_width, bit_width));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return (AE_SUPPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return (AE_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * FUNCTION: acpi_hw_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * PARAMETERS: value - Where the value is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * reg - GAS register structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * DESCRIPTION: Read from either memory or IO space. This is a 64-bit max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * version of acpi_read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * LIMITATIONS: <These limitations also apply to acpi_hw_write>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * space_ID must be system_memory or system_IO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) acpi_status acpi_hw_read(u64 *value, struct acpi_generic_address *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) u32 bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) u8 bit_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) u64 value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) u32 value32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ACPI_FUNCTION_NAME(hw_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* Validate contents of the GAS register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) status = acpi_hw_validate_register(reg, 64, &address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * Initialize entire 64-bit return value to zero, convert access_width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * into number of bits based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) *value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) access_width = acpi_hw_get_access_bit_width(address, reg, 64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) bit_width = reg->bit_offset + reg->bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) bit_offset = reg->bit_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * Two address spaces supported: Memory or IO. PCI_Config is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * not supported here because the GAS structure is insufficient
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) while (bit_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (bit_offset >= access_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) value64 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) bit_offset -= access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) acpi_os_read_memory((acpi_physical_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) address +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) index *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ACPI_DIV_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) (access_width),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) &value64, access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) status = acpi_hw_read_port((acpi_io_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) address +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) index *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ACPI_DIV_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) (access_width),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) &value32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) value64 = (u64)value32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * Use offset style bit writes because "Index * AccessWidth" is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * ensured to be less than 64-bits by acpi_hw_validate_register().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ACPI_SET_BITS(value, index * access_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ACPI_MASK_BITS_ABOVE_64(access_width), value64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) bit_width -=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) bit_width > access_width ? access_width : bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ACPI_DEBUG_PRINT((ACPI_DB_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ACPI_FORMAT_UINT64(*value), access_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ACPI_FORMAT_UINT64(address),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) acpi_ut_get_region_name(reg->space_id)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * FUNCTION: acpi_hw_write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * PARAMETERS: value - Value to be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * reg - GAS register structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * DESCRIPTION: Write to either memory or IO space. This is a 64-bit max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * version of acpi_write.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) acpi_status acpi_hw_write(u64 value, struct acpi_generic_address *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u8 access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) u32 bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u8 bit_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u64 value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ACPI_FUNCTION_NAME(hw_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* Validate contents of the GAS register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) status = acpi_hw_validate_register(reg, 64, &address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* Convert access_width into number of bits based */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) access_width = acpi_hw_get_access_bit_width(address, reg, 64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) bit_width = reg->bit_offset + reg->bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) bit_offset = reg->bit_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * Two address spaces supported: Memory or IO. PCI_Config is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * not supported here because the GAS structure is insufficient
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) while (bit_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * Use offset style bit reads because "Index * AccessWidth" is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * ensured to be less than 64-bits by acpi_hw_validate_register().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) value64 = ACPI_GET_BITS(&value, index * access_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ACPI_MASK_BITS_ABOVE_64(access_width));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (bit_offset >= access_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) bit_offset -= access_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) acpi_os_write_memory((acpi_physical_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) address +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) index *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ACPI_DIV_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) (access_width),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) value64, access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) status = acpi_hw_write_port((acpi_io_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) address +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) index *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ACPI_DIV_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) (access_width),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) (u32)value64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) access_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * Index * access_width is ensured to be less than 32-bits by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * acpi_hw_validate_register().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) bit_width -=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) bit_width > access_width ? access_width : bit_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ACPI_DEBUG_PRINT((ACPI_DB_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) "Wrote: %8.8X%8.8X width %2d to %8.8X%8.8X (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ACPI_FORMAT_UINT64(value), access_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ACPI_FORMAT_UINT64(address),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) acpi_ut_get_region_name(reg->space_id)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #if (!ACPI_REDUCED_HARDWARE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * FUNCTION: acpi_hw_clear_acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * PARAMETERS: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * DESCRIPTION: Clears all fixed and general purpose status bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) acpi_status acpi_hw_clear_acpi_status(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) acpi_cpu_flags lock_flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ACPI_BITMASK_ALL_FIXED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) lock_flags = acpi_os_acquire_raw_lock(acpi_gbl_hardware_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Clear the fixed events in PM1 A/B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ACPI_BITMASK_ALL_FIXED_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) acpi_os_release_raw_lock(acpi_gbl_hardware_lock, lock_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* Clear the GPE Bits in all GPE registers in all GPE blocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return_ACPI_STATUS(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * FUNCTION: acpi_hw_get_bit_register_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * PARAMETERS: register_id - Index of ACPI Register to access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * RETURN: The bitmask to be used when accessing the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * DESCRIPTION: Map register_id into a register bitmask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ACPI_FUNCTION_ENTRY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (register_id > ACPI_BITREG_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) register_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return (NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return (&acpi_gbl_bit_register_info[register_id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * FUNCTION: acpi_hw_write_pm1_control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * PARAMETERS: pm1a_control - Value to be written to PM1A control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * pm1b_control - Value to be written to PM1B control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * DESCRIPTION: Write the PM1 A/B control registers. These registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * different than than the PM1 A/B status and enable registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * in that different values can be written to the A/B registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * Most notably, the SLP_TYP bits can be different, as per the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * values returned from the _Sx predefined methods.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) ACPI_FUNCTION_TRACE(hw_write_pm1_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return_ACPI_STATUS(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (acpi_gbl_FADT.xpm1b_control_block.address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) acpi_hw_write(pm1b_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) &acpi_gbl_FADT.xpm1b_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return_ACPI_STATUS(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * FUNCTION: acpi_hw_register_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * PARAMETERS: register_id - ACPI Register ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * return_value - Where the register value is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * RETURN: Status and the value read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * DESCRIPTION: Read from the specified ACPI register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u32 value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u64 value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ACPI_FUNCTION_TRACE(hw_register_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) switch (register_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) status = acpi_hw_read_multiple(&value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) &acpi_gbl_xpm1a_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) &acpi_gbl_xpm1b_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) status = acpi_hw_read_multiple(&value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) &acpi_gbl_xpm1a_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) &acpi_gbl_xpm1b_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) status = acpi_hw_read_multiple(&value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) xpm1a_control_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) xpm1b_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * Zero the write-only bits. From the ACPI specification, "Hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * Write-Only Bits": "Upon reads to registers with write-only bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * software masks out all write-only bits."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) acpi_hw_read(&value64, &acpi_gbl_FADT.xpm2_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) value = (u32)value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) status = acpi_hw_read(&value64, &acpi_gbl_FADT.xpm_timer_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) value = (u32)value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) status = AE_BAD_PARAMETER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (ACPI_SUCCESS(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) *return_value = (u32)value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return_ACPI_STATUS(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * FUNCTION: acpi_hw_register_write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * PARAMETERS: register_id - ACPI Register ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * value - The value to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * DESCRIPTION: Write to the specified ACPI register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * NOTE: In accordance with the ACPI specification, this function automatically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * preserves the value of the following bits, meaning that these bits cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * changed via this interface:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * PM1_CONTROL[0] = SCI_EN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * PM1_CONTROL[9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) * PM1_STATUS[11]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * ACPI References:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * 1) Hardware Ignored Bits: When software writes to a register with ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * bit fields, it preserves the ignored bit fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * 2) SCI_EN: OSPM always preserves this bit position
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) acpi_status acpi_hw_register_write(u32 register_id, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u32 read_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) u64 read_value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) ACPI_FUNCTION_TRACE(hw_register_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) switch (register_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * Handle the "ignored" bit in PM1 Status. According to the ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) * specification, ignored bits are to be preserved when writing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) * Normally, this would mean a read/modify/write sequence. However,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) * preserving a bit in the status register is different. Writing a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * one clears the status, and writing a zero preserves the status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * Therefore, we must always write zero to the ignored bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * This behavior is clarified in the ACPI 4.0 specification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) status = acpi_hw_write_multiple(value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) &acpi_gbl_xpm1a_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) &acpi_gbl_xpm1b_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) status = acpi_hw_write_multiple(value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) &acpi_gbl_xpm1a_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) &acpi_gbl_xpm1b_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * Perform a read first to preserve certain bits (per ACPI spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * Note: This includes SCI_EN, we never want to change this bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) status = acpi_hw_read_multiple(&read_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) xpm1a_control_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) xpm1b_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) /* Insert the bits to be preserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) read_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /* Now we can write the data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) status = acpi_hw_write_multiple(value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) xpm1a_control_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) &acpi_gbl_FADT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) xpm1b_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * For control registers, all reserved bits must be preserved,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * as per the ACPI spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) acpi_hw_read(&read_value64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) &acpi_gbl_FADT.xpm2_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) read_value = (u32)read_value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* Insert the bits to be preserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) read_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /* SMI_CMD is currently always in IO space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) status = AE_BAD_PARAMETER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return_ACPI_STATUS(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * FUNCTION: acpi_hw_read_multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * PARAMETERS: value - Where the register value is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * register_a - First ACPI register (required)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) * register_b - Second ACPI register (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) static acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) acpi_hw_read_multiple(u32 *value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) struct acpi_generic_address *register_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct acpi_generic_address *register_b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) u32 value_a = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) u32 value_b = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u64 value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) /* The first register is always required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) status = acpi_hw_read(&value64, register_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) value_a = (u32)value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /* Second register is optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (register_b->address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) status = acpi_hw_read(&value64, register_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) value_b = (u32)value64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) * OR the two return values together. No shifting or masking is necessary,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * because of how the PM1 registers are defined in the ACPI specification:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * "Although the bits can be split between the two register blocks (each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * register block has a unique pointer within the FADT), the bit positions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * are maintained. The register block with unimplemented bits (that is,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * those implemented in the other register block) always returns zeros,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * and writes have no side effects"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) *value = (value_a | value_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return (AE_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * FUNCTION: acpi_hw_write_multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * PARAMETERS: value - The value to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * register_a - First ACPI register (required)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * register_b - Second ACPI register (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) * RETURN: Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static acpi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) acpi_hw_write_multiple(u32 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct acpi_generic_address *register_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct acpi_generic_address *register_b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) /* The first register is always required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) status = acpi_hw_write(value, register_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * Second register is optional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * No bit shifting or clearing is necessary, because of how the PM1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * registers are defined in the ACPI specification:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * "Although the bits can be split between the two register blocks (each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * register block has a unique pointer within the FADT), the bit positions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) * are maintained. The register block with unimplemented bits (that is,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) * those implemented in the other register block) always returns zeros,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) * and writes have no side effects"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (register_b->address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) status = acpi_hw_write(value, register_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) #endif /* !ACPI_REDUCED_HARDWARE */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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