^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2019 Linaro, Ltd. <ard.biesheuvel@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifdef CONFIG_ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/neon-intrinsics.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define AES_ROUND "aese %0.16b, %1.16b \n\t aesmc %0.16b, %0.16b"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <arm_neon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define AES_ROUND "aese.8 %q0, %q1 \n\t aesmc.8 %q0, %q0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AEGIS_BLOCK_SIZE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern int aegis128_have_aes_insn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) void *memcpy(void *dest, const void *src, size_t n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void *memset(void *s, int c, size_t n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct aegis128_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) uint8x16_t v[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) extern const uint8_t crypto_aes_sbox[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct aegis128_state aegis128_load_state_neon(const void *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return (struct aegis128_state){ {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) vld1q_u8(state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) vld1q_u8(state + 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) vld1q_u8(state + 32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) vld1q_u8(state + 48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) vld1q_u8(state + 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static void aegis128_save_state_neon(struct aegis128_state st, void *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) vst1q_u8(state, st.v[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) vst1q_u8(state + 16, st.v[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) vst1q_u8(state + 32, st.v[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) vst1q_u8(state + 48, st.v[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) vst1q_u8(state + 64, st.v[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static inline __attribute__((always_inline))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) uint8x16_t aegis_aes_round(uint8x16_t w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) uint8x16_t z = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #ifdef CONFIG_ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!__builtin_expect(aegis128_have_aes_insn, 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static const uint8_t shift_rows[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 0x0, 0x5, 0xa, 0xf, 0x4, 0x9, 0xe, 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 0x8, 0xd, 0x2, 0x7, 0xc, 0x1, 0x6, 0xb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const uint8_t ror32by8[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 0x1, 0x2, 0x3, 0x0, 0x5, 0x6, 0x7, 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 0x9, 0xa, 0xb, 0x8, 0xd, 0xe, 0xf, 0xc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) uint8x16_t v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) // shift rows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) w = vqtbl1q_u8(w, vld1q_u8(shift_rows));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) // sub bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #ifndef CONFIG_CC_IS_GCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) v = vqtbl4q_u8(vld1q_u8_x4(crypto_aes_sbox), w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x40), w - 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x80), w - 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0xc0), w - 0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) asm("tbl %0.16b, {v16.16b-v19.16b}, %1.16b" : "=w"(v) : "w"(w));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) w -= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) asm("tbx %0.16b, {v20.16b-v23.16b}, %1.16b" : "+w"(v) : "w"(w));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) w -= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) asm("tbx %0.16b, {v24.16b-v27.16b}, %1.16b" : "+w"(v) : "w"(w));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) w -= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) asm("tbx %0.16b, {v28.16b-v31.16b}, %1.16b" : "+w"(v) : "w"(w));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) // mix columns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) w = (v << 1) ^ (uint8x16_t)(((int8x16_t)v >> 7) & 0x1b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) w ^= (uint8x16_t)vrev32q_u16((uint16x8_t)v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) w ^= vqtbl1q_u8(v ^ w, vld1q_u8(ror32by8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * We use inline asm here instead of the vaeseq_u8/vaesmcq_u8 intrinsics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * to force the compiler to issue the aese/aesmc instructions in pairs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * This is much faster on many cores, where the instruction pair can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * execute in a single cycle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) asm(AES_ROUND : "+w"(w) : "w"(z));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline __attribute__((always_inline))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct aegis128_state aegis128_update_neon(struct aegis128_state st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) uint8x16_t m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) m ^= aegis_aes_round(st.v[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) st.v[4] ^= aegis_aes_round(st.v[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) st.v[3] ^= aegis_aes_round(st.v[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) st.v[2] ^= aegis_aes_round(st.v[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) st.v[1] ^= aegis_aes_round(st.v[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) st.v[0] ^= m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static inline __attribute__((always_inline))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) void preload_sbox(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!IS_ENABLED(CONFIG_ARM64) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) !IS_ENABLED(CONFIG_CC_IS_GCC) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) __builtin_expect(aegis128_have_aes_insn, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) asm("ld1 {v16.16b-v19.16b}, [%0], #64 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) "ld1 {v20.16b-v23.16b}, [%0], #64 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) "ld1 {v24.16b-v27.16b}, [%0], #64 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) "ld1 {v28.16b-v31.16b}, [%0] \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) :: "r"(crypto_aes_sbox));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void crypto_aegis128_init_neon(void *state, const void *key, const void *iv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const uint8_t const0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 0x00, 0x01, 0x01, 0x02, 0x03, 0x05, 0x08, 0x0d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 0x15, 0x22, 0x37, 0x59, 0x90, 0xe9, 0x79, 0x62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const uint8_t const1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 0xdb, 0x3d, 0x18, 0x55, 0x6d, 0xc2, 0x2f, 0xf1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 0x20, 0x11, 0x31, 0x42, 0x73, 0xb5, 0x28, 0xdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) uint8x16_t k = vld1q_u8(key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) uint8x16_t kiv = k ^ vld1q_u8(iv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct aegis128_state st = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) kiv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) vld1q_u8(const1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) vld1q_u8(const0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) k ^ vld1q_u8(const0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) k ^ vld1q_u8(const1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) preload_sbox();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) for (i = 0; i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) st = aegis128_update_neon(st, k);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) st = aegis128_update_neon(st, kiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) aegis128_save_state_neon(st, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void crypto_aegis128_update_neon(void *state, const void *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct aegis128_state st = aegis128_load_state_neon(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) preload_sbox();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) st = aegis128_update_neon(st, vld1q_u8(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) aegis128_save_state_neon(st, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) void crypto_aegis128_encrypt_chunk_neon(void *state, void *dst, const void *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct aegis128_state st = aegis128_load_state_neon(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) uint8x16_t msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) preload_sbox();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) while (size >= AEGIS_BLOCK_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) msg = vld1q_u8(src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) st = aegis128_update_neon(st, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) vst1q_u8(dst, msg ^ s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) size -= AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) src += AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) dst += AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) uint8_t buf[AEGIS_BLOCK_SIZE] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) memcpy(buf, src, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) msg = vld1q_u8(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) st = aegis128_update_neon(st, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) vst1q_u8(buf, msg ^ s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) memcpy(dst, buf, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) aegis128_save_state_neon(st, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) void crypto_aegis128_decrypt_chunk_neon(void *state, void *dst, const void *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct aegis128_state st = aegis128_load_state_neon(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) uint8x16_t msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) preload_sbox();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) while (size >= AEGIS_BLOCK_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) msg = vld1q_u8(src) ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) st = aegis128_update_neon(st, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) vst1q_u8(dst, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) size -= AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) src += AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) dst += AEGIS_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) uint8_t buf[AEGIS_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) vst1q_u8(buf, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) memcpy(buf, src, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) msg = vld1q_u8(buf) ^ s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) vst1q_u8(buf, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) memcpy(dst, buf, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) st = aegis128_update_neon(st, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) aegis128_save_state_neon(st, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) void crypto_aegis128_final_neon(void *state, void *tag_xor, uint64_t assoclen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) uint64_t cryptlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct aegis128_state st = aegis128_load_state_neon(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) uint8x16_t v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) preload_sbox();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) v = st.v[3] ^ (uint8x16_t)vcombine_u64(vmov_n_u64(8 * assoclen),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) vmov_n_u64(8 * cryptlen));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) for (i = 0; i < 7; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) st = aegis128_update_neon(st, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) v = vld1q_u8(tag_xor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) v ^= st.v[0] ^ st.v[1] ^ st.v[2] ^ st.v[3] ^ st.v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) vst1q_u8(tag_xor, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }