^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/xtensa/kernel/module.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Module support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2001 - 2006 Tensilica Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Chris Zankel <chris@zankel.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/moduleloader.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/elf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) decode_calln_opcode (unsigned char *location)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #ifdef __XTENSA_EB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return (location[0] & 0xf0) == 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #ifdef __XTENSA_EL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return (location[0] & 0xf) == 0x5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) decode_l32r_opcode (unsigned char *location)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef __XTENSA_EB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return (location[0] & 0xf0) == 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #ifdef __XTENSA_EL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return (location[0] & 0xf) == 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int apply_relocate_add(Elf32_Shdr *sechdrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) const char *strtab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned int symindex,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int relsec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct module *mod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Elf32_Sym *sym;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned char *location;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) uint32_t value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pr_debug("Applying relocate section %u to %u\n", relsec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sechdrs[relsec].sh_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) location = (char *)sechdrs[sechdrs[relsec].sh_info].sh_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) + rela[i].r_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) + ELF32_R_SYM(rela[i].r_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) value = sym->st_value + rela[i].r_addend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) switch (ELF32_R_TYPE(rela[i].r_info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case R_XTENSA_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case R_XTENSA_DIFF8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case R_XTENSA_DIFF16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case R_XTENSA_DIFF32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) case R_XTENSA_ASM_EXPAND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) case R_XTENSA_32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case R_XTENSA_PLT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *(uint32_t *)location += value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case R_XTENSA_SLOT0_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (decode_calln_opcode(location)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) value -= ((unsigned long)location & -4) + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if ((value & 3) != 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ((value + (1 << 19)) >> 20) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) pr_err("%s: relocation out of range, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "section %d reloc %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "sym '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) mod->name, relsec, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) strtab + sym->st_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) value = (signed int)value >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #ifdef __XTENSA_EB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) location[0] = ((location[0] & ~0x3) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ((value >> 16) & 0x3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) location[1] = (value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) location[2] = value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #ifdef __XTENSA_EL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) location[0] = ((location[0] & ~0xc0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ((value << 6) & 0xc0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) location[1] = (value >> 2) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) location[2] = (value >> 10) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) } else if (decode_l32r_opcode(location)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) value -= (((unsigned long)location + 3) & -4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if ((value & 3) != 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) (signed int)value >> 18 != -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pr_err("%s: relocation out of range, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) "section %d reloc %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) "sym '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) mod->name, relsec, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) strtab + sym->st_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) value = (signed int)value >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #ifdef __XTENSA_EB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) location[1] = (value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) location[2] = value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #ifdef __XTENSA_EL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) location[1] = value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) location[2] = (value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* FIXME: Ignore any other opcodes. The Xtensa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) assembler currently assumes that the linker will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) always do relaxation and so all PC-relative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) operands need relocations. (The assembler also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) writes out the tentative PC-relative values,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) assuming no link-time relaxation, so it is usually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) safe to ignore the relocations.) If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) assembler's "--no-link-relax" flag can be made to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) work, and if all kernel modules can be assembled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) with that flag, then unexpected relocations could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) be detected here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) case R_XTENSA_SLOT1_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case R_XTENSA_SLOT2_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) case R_XTENSA_SLOT3_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case R_XTENSA_SLOT4_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case R_XTENSA_SLOT5_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) case R_XTENSA_SLOT6_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) case R_XTENSA_SLOT7_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case R_XTENSA_SLOT8_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) case R_XTENSA_SLOT9_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) case R_XTENSA_SLOT10_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case R_XTENSA_SLOT11_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) case R_XTENSA_SLOT12_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) case R_XTENSA_SLOT13_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case R_XTENSA_SLOT14_OP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pr_err("%s: unexpected FLIX relocation: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mod->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ELF32_R_TYPE(rela[i].r_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) case R_XTENSA_SLOT0_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) case R_XTENSA_SLOT1_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case R_XTENSA_SLOT2_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case R_XTENSA_SLOT3_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) case R_XTENSA_SLOT4_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) case R_XTENSA_SLOT5_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case R_XTENSA_SLOT6_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case R_XTENSA_SLOT7_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) case R_XTENSA_SLOT8_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) case R_XTENSA_SLOT9_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) case R_XTENSA_SLOT10_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) case R_XTENSA_SLOT11_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) case R_XTENSA_SLOT12_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case R_XTENSA_SLOT13_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case R_XTENSA_SLOT14_ALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) pr_err("%s: unexpected ALT relocation: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) mod->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ELF32_R_TYPE(rela[i].r_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) pr_err("%s: unexpected relocation: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) mod->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ELF32_R_TYPE(rela[i].r_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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