^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) / {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) compatible = "cdns,xtensa-xtfpga";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) interrupt-parent = <&pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) chosen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) bootargs = "earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) memory@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) device_type = "memory";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) reg = <0x00000000 0x06000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible = "cdns,xtensa-cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) pic: pic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) compatible = "cdns,xtensa-pic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* one cell: internal irq number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * two cells: second cell == 0: internal irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * second cell == 1: external irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) clocks {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) clk54: clk54 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) compatible = "fixed-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) clock-frequency = <54000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) soc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) compatible = "simple-bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ranges = <0x00000000 0xf0000000 0x10000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) osc: main-oscillator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) compatible = "cdns,xtfpga-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) reg = <0x0d020004 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) serial0: serial@0d050020 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) device_type = "serial";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) compatible = "ns16550a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) no-loopback-test;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reg = <0x0d050020 0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) native-endian;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) interrupts = <0 1>; /* external irq 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) enet0: ethoc@0d030000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) compatible = "opencores,ethoc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) native-endian;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) interrupts = <1 1>; /* external irq 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) local-mac-address = [00 50 c2 13 6f 00];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) i2s0: xtfpga-i2s@0d080000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #sound-dai-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) compatible = "cdns,xtfpga-i2s";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) reg = <0x0d080000 0x40>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) interrupts = <2 1>; /* external irq 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) clocks = <&cdce706 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) i2c0: i2c-master@0d090000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) compatible = "opencores,i2c-ocores";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reg = <0x0d090000 0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) native-endian;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) interrupts = <4 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) cdce706: clock-synth@69 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) compatible = "ti,cdce706";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) reg = <0x69>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) clocks = <&clk54>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clock-names = "clk_in0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) spi0: spi@0d0a0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) compatible = "cdns,xtfpga-spi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) reg = <0x0d0a0000 0xc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) tlv320aic23: sound-codec@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #sound-dai-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) compatible = "tlv320aic23";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) spi-max-frequency = <12500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sound {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) compatible = "simple-audio-card";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) simple-audio-card,format = "i2s";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) simple-audio-card,mclk-fs = <256>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) simple-audio-card,cpu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) sound-dai = <&i2s0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) simple-audio-card,codec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) sound-dai = <&tlv320aic23>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) simple-audio-card,bitclock-master = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) simple-audio-card,frame-master = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) clocks = <&cdce706 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };