^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /dts-v1/;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) / {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) compatible = "cdns,xtensa-iss";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) interrupt-parent = <&pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) chosen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) bootargs = "console=ttyS0,115200n8 debug";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) memory@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) device_type = "memory";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) reg = <0x00000000 0x80000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) compatible = "cdns,xtensa-cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) clocks {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) osc: osc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) compatible = "fixed-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) clock-frequency = <40000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) pic: pic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) compatible = "cdns,xtensa-pic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* one cell: internal irq number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * two cells: second cell == 0: internal irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * second cell == 1: external irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #address-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pci {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) compatible = "pci-host-ecam-generic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) device_type = "pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #interrupt-cells = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) bus-range = <0x0 0x3e>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) reg = <0xf0100000 0x03f00000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) // BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ranges = <0x01000000 0x0 0x00000000 0xf0000000 0x0 0x00010000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) interrupt-map = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 0x0000 0x0 0x0 0x1 &pic 0x0 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 0x0800 0x0 0x0 0x1 &pic 0x1 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 0x1000 0x0 0x0 0x1 &pic 0x2 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 0x1800 0x0 0x0 0x1 &pic 0x3 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) interrupt-map-mask = <0x1800 0x0 0x0 0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };