Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *	Low-Level PCI Access for i386 machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 1993, 1994 Drew Eckhardt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *      Visionary Computing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *      (Unix and Linux consulting and custom programming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *      Drew@Colorado.EDU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *      +1 (303) 786-7975
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Drew's work was sponsored by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *	iX Multiuser Multitasking Magazine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *	Hannover, Germany
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *	hm@ix.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * For more information, please consult the following manuals (look at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * http://www.pcisig.com/ for how to get them):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * PCI BIOS Specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * PCI Local Bus Specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * PCI to PCI Bridge Specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * PCI System Design Guide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <asm/memtype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/e820/api.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/pci_x86.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <asm/io_apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * This list of dynamic mappings is for temporarily maintaining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * original BIOS BAR addresses for possible reinstatement.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) struct pcibios_fwaddrmap {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	resource_size_t fw_addr[DEVICE_COUNT_RESOURCE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static LIST_HEAD(pcibios_fwaddrmappings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static DEFINE_SPINLOCK(pcibios_fwaddrmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static bool pcibios_fw_addr_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /* Must be called with 'pcibios_fwaddrmap_lock' lock held. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static struct pcibios_fwaddrmap *pcibios_fwaddrmap_lookup(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct pcibios_fwaddrmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	lockdep_assert_held(&pcibios_fwaddrmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	list_for_each_entry(map, &pcibios_fwaddrmappings, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		if (map->dev == dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			return map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) pcibios_save_fw_addr(struct pci_dev *dev, int idx, resource_size_t fw_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct pcibios_fwaddrmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (pcibios_fw_addr_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	map = pcibios_fwaddrmap_lookup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (!map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		map = kzalloc(sizeof(*map), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		if (!map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		map->dev = pci_dev_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		map->fw_addr[idx] = fw_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		INIT_LIST_HEAD(&map->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		list_add_tail(&map->list, &pcibios_fwaddrmappings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		map->fw_addr[idx] = fw_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct pcibios_fwaddrmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	resource_size_t fw_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (pcibios_fw_addr_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	map = pcibios_fwaddrmap_lookup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		fw_addr = map->fw_addr[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return fw_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void __init pcibios_fw_addr_list_del(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct pcibios_fwaddrmap *entry, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	list_for_each_entry_safe(entry, next, &pcibios_fwaddrmappings, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		list_del(&entry->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		pci_dev_put(entry->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		kfree(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	pcibios_fw_addr_done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) skip_isa_ioresource_align(struct pci_dev *dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	    !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)  * We need to avoid collisions with `mirrored' VGA ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)  * and other strange ISA hardware, so we always want the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)  * addresses to be allocated in the 0x000-0x0ff region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)  * modulo 0x400.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  * Why? Because some silly external IO cards only decode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  * the low 10 bits of the IO address. The 0x00-0xff region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  * is reserved for motherboard devices that decode all 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)  * but we want to try to avoid allocating at 0x2900-0x2bff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)  * which might have be mirrored at 0x0100-0x03ff..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) resource_size_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) pcibios_align_resource(void *data, const struct resource *res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			resource_size_t size, resource_size_t align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	struct pci_dev *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	resource_size_t start = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (res->flags & IORESOURCE_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		if (skip_isa_ioresource_align(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			return start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (start & 0x300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			start = (start + 0x3ff) & ~0x3ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	} else if (res->flags & IORESOURCE_MEM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		/* The low 1MB range is reserved for ISA cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		if (start < BIOS_END)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			start = BIOS_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) EXPORT_SYMBOL(pcibios_align_resource);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  *  Handle resources of PCI devices.  If the world were perfect, we could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)  *  just allocate all the resource regions and do nothing more.  It isn't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  *  On the other hand, we cannot just re-allocate all devices, as it would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  *  require us to know lots of host bridge internals.  So we attempt to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  *  keep as much of the original configuration as possible, but tweak it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)  *  when it's found to be wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)  *  Known BIOS problems we have to work around:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)  *	- I/O or memory regions not configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)  *	- regions configured, but not enabled in the command register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  *	- bogus I/O addresses above 64K used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  *	- expansion ROMs left enabled (this may sound harmless, but given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  *	  the fact the PCI specs explicitly allow address decoders to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  *	  shared between expansion ROMs and other resource regions, it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  *	  at least dangerous)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  *	- bad resource sizes or overlaps with other regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  *  Our solution:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)  *	(1) Allocate resources for all buses behind PCI-to-PCI bridges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)  *	    This gives us fixed barriers on where we can allocate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  *	(2) Allocate resources for all enabled devices.  If there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)  *	    a collision, just mark the resource as unallocated. Also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  *	    disable expansion ROMs during this step.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  *	(3) Try to allocate resources for disabled devices.  If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  *	    resources were assigned correctly, everything goes well,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  *	    if they weren't, they won't disturb allocation of other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  *	    resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  *	(4) Assign new addresses to resources which were either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)  *	    not configured at all or misconfigured.  If explicitly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)  *	    requested by the user, configure expansion ROM address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)  *	    as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static void pcibios_allocate_bridge_resources(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		r = &dev->resource[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		if (!r->flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		if (r->parent)	/* Already allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			 * Something is wrong with the region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			 * Invalidate the resource to prevent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			 * child resource allocations in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			 * range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			r->start = r->end = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			r->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static void pcibios_allocate_bus_resources(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct pci_bus *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/* Depth-First Search on bus tree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	if (bus->self)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		pcibios_allocate_bridge_resources(bus->self);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	list_for_each_entry(child, &bus->children, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		pcibios_allocate_bus_resources(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct pci_check_idx_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	int start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	int end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static void pcibios_allocate_dev_resources(struct pci_dev *dev, int pass)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	int idx, disabled, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	struct pci_check_idx_range idx_range[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		{ PCI_STD_RESOURCES, PCI_STD_RESOURCE_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #ifdef CONFIG_PCI_IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		{ PCI_IOV_RESOURCES, PCI_IOV_RESOURCE_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	pci_read_config_word(dev, PCI_COMMAND, &command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	for (i = 0; i < ARRAY_SIZE(idx_range); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		for (idx = idx_range[i].start; idx <= idx_range[i].end; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			r = &dev->resource[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			if (r->parent)	/* Already allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			if (!r->start)	/* Address not assigned at all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			if (r->flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 				disabled = !(command & PCI_COMMAND_IO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 				disabled = !(command & PCI_COMMAND_MEMORY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			if (pass == disabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 				dev_dbg(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 					"BAR %d: reserving %pr (d=%d, p=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 					idx, r, disabled, pass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 				if (pci_claim_resource(dev, idx) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 					if (r->flags & IORESOURCE_PCI_FIXED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 						dev_info(&dev->dev, "BAR %d %pR is immovable\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 							 idx, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 					} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 						/* We'll assign a new address later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 						pcibios_save_fw_addr(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 								idx, r->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 						r->end -= r->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 						r->start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 					}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	if (!pass) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		r = &dev->resource[PCI_ROM_RESOURCE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		if (r->flags & IORESOURCE_ROM_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			/* Turn the ROM off, leave the resource region,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			 * but keep it unregistered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			dev_dbg(&dev->dev, "disabling ROM %pR\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			r->flags &= ~IORESOURCE_ROM_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			pci_read_config_dword(dev, dev->rom_base_reg, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			pci_write_config_dword(dev, dev->rom_base_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 						reg & ~PCI_ROM_ADDRESS_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static void pcibios_allocate_resources(struct pci_bus *bus, int pass)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	struct pci_bus *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	list_for_each_entry(dev, &bus->devices, bus_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		pcibios_allocate_dev_resources(dev, pass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		child = dev->subordinate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		if (child)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 			pcibios_allocate_resources(child, pass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static void pcibios_allocate_dev_rom_resource(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	 * Try to use BIOS settings for ROMs, otherwise let
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	 * pci_assign_unassigned_resources() allocate the new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	 * addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	r = &dev->resource[PCI_ROM_RESOURCE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (!r->flags || !r->start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (r->parent) /* Already allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	if (pci_claim_resource(dev, PCI_ROM_RESOURCE) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		r->end -= r->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		r->start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static void pcibios_allocate_rom_resources(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	struct pci_bus *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	list_for_each_entry(dev, &bus->devices, bus_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		pcibios_allocate_dev_rom_resource(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		child = dev->subordinate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		if (child)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			pcibios_allocate_rom_resources(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int __init pcibios_assign_resources(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	if (!(pci_probe & PCI_ASSIGN_ROMS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		list_for_each_entry(bus, &pci_root_buses, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			pcibios_allocate_rom_resources(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	pci_assign_unassigned_resources();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	pcibios_fw_addr_list_del();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)  * called in fs_initcall (one below subsys_initcall),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)  * give a chance for motherboard reserve resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) fs_initcall(pcibios_assign_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) void pcibios_resource_survey_bus(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	dev_printk(KERN_DEBUG, &bus->dev, "Allocating resources\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	pcibios_allocate_bus_resources(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	pcibios_allocate_resources(bus, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	pcibios_allocate_resources(bus, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	if (!(pci_probe & PCI_ASSIGN_ROMS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		pcibios_allocate_rom_resources(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) void __init pcibios_resource_survey(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	DBG("PCI: Allocating resources\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	list_for_each_entry(bus, &pci_root_buses, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		pcibios_allocate_bus_resources(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	list_for_each_entry(bus, &pci_root_buses, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		pcibios_allocate_resources(bus, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	list_for_each_entry(bus, &pci_root_buses, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		pcibios_allocate_resources(bus, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	e820__reserve_resources_late();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	 * Insert the IO APIC resources after PCI initialization has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	 * occurred to handle IO APICS that are mapped in on a BAR in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	 * PCI space, but before trying to assign unassigned pci res.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	ioapic_insert_resources();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }