^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fault Injection Test harness (FI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) Intel Crop.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /* Id: pf_in.c,v 1.1.1.1 2002/11/12 05:56:32 brlock Exp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright by Intel Crop., 2002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Louis Zhuang (louis.zhuang@intel.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Bjorn Steinbrink (B.Steinbrink@gmx.de), 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ptrace.h> /* struct pt_regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pf_in.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifdef __i386__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* IA32 Manual 3, 2-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static unsigned char prefix_codes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 0x65, 0x66, 0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* IA32 Manual 3, 3-432*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static unsigned int reg_rop[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 0x8A, 0x8B, 0xB60F, 0xB70F, 0xBE0F, 0xBF0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static unsigned int reg_wop[] = { 0x88, 0x89, 0xAA, 0xAB };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static unsigned int imm_wop[] = { 0xC6, 0xC7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* IA32 Manual 3, 3-432*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int rw8[] = { 0x88, 0x8A, 0xC6, 0xAA };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static unsigned int rw32[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0x89, 0x8B, 0xC7, 0xB60F, 0xB70F, 0xBE0F, 0xBF0F, 0xAB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static unsigned int mw8[] = { 0x88, 0x8A, 0xC6, 0xB60F, 0xBE0F, 0xAA };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static unsigned int mw16[] = { 0xB70F, 0xBF0F };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static unsigned int mw32[] = { 0x89, 0x8B, 0xC7, 0xAB };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static unsigned int mw64[] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #else /* not __i386__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static unsigned char prefix_codes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 0x66, 0x67, 0x2E, 0x3E, 0x26, 0x64, 0x65, 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 0xF0, 0xF3, 0xF2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* REX Prefixes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* AMD64 Manual 3, Appendix A*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static unsigned int reg_rop[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 0x8A, 0x8B, 0xB60F, 0xB70F, 0xBE0F, 0xBF0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static unsigned int reg_wop[] = { 0x88, 0x89, 0xAA, 0xAB };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static unsigned int imm_wop[] = { 0xC6, 0xC7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static unsigned int rw8[] = { 0xC6, 0x88, 0x8A, 0xAA };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static unsigned int rw32[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0xC7, 0x89, 0x8B, 0xB60F, 0xB70F, 0xBE0F, 0xBF0F, 0xAB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* 8 bit only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static unsigned int mw8[] = { 0xC6, 0x88, 0x8A, 0xB60F, 0xBE0F, 0xAA };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* 16 bit only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static unsigned int mw16[] = { 0xB70F, 0xBF0F };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* 16 or 32 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static unsigned int mw32[] = { 0xC7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* 16, 32 or 64 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static unsigned int mw64[] = { 0x89, 0x8B, 0xAB };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif /* not __i386__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct prefix_bits {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned shorted:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned enlarged:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned rexr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned rex:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int skip_prefix(unsigned char *addr, struct prefix_bits *prf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned char *p = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) prf->shorted = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) prf->enlarged = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) prf->rexr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) prf->rex = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) restart:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) for (i = 0; i < ARRAY_SIZE(prefix_codes); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (*p == prefix_codes[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (*p == 0x66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) prf->shorted = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if ((*p & 0xf8) == 0x48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) prf->enlarged = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if ((*p & 0xf4) == 0x44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) prf->rexr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if ((*p & 0xf0) == 0x40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) prf->rex = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) p++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) goto restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return (p - addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int get_opcode(unsigned char *addr, unsigned int *opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (*addr == 0x0F) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* 0x0F is extension instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) *opcode = *(unsigned short *)addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) *opcode = *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define CHECK_OP_TYPE(opcode, array, type) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) for (i = 0; i < ARRAY_SIZE(array); i++) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (array[i] == opcode) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) rv = type; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) goto exit; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) enum reason_type get_ins_type(unsigned long ins_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct prefix_bits prf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) enum reason_type rv = OTHERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) p = (unsigned char *)ins_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) p += skip_prefix(p, &prf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) p += get_opcode(p, &opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) CHECK_OP_TYPE(opcode, reg_rop, REG_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) CHECK_OP_TYPE(opcode, imm_wop, IMM_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #undef CHECK_OP_TYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static unsigned int get_ins_reg_width(unsigned long ins_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct prefix_bits prf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) p = (unsigned char *)ins_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) p += skip_prefix(p, &prf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) p += get_opcode(p, &opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) for (i = 0; i < ARRAY_SIZE(rw8); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (rw8[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) for (i = 0; i < ARRAY_SIZE(rw32); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (rw32[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return prf.shorted ? 2 : (prf.enlarged ? 8 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) printk(KERN_ERR "mmiotrace: Unknown opcode 0x%02x\n", opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) unsigned int get_ins_mem_width(unsigned long ins_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct prefix_bits prf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) p = (unsigned char *)ins_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) p += skip_prefix(p, &prf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) p += get_opcode(p, &opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) for (i = 0; i < ARRAY_SIZE(mw8); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (mw8[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) for (i = 0; i < ARRAY_SIZE(mw16); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (mw16[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) for (i = 0; i < ARRAY_SIZE(mw32); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (mw32[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return prf.shorted ? 2 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) for (i = 0; i < ARRAY_SIZE(mw64); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (mw64[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return prf.shorted ? 2 : (prf.enlarged ? 8 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) printk(KERN_ERR "mmiotrace: Unknown opcode 0x%02x\n", opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * Define register ident in mod/rm byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Note: these are NOT the same as in ptrace-abi.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) arg_AL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) arg_CL = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) arg_DL = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) arg_BL = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) arg_AH = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) arg_CH = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) arg_DH = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) arg_BH = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) arg_AX = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) arg_CX = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) arg_DX = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) arg_BX = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) arg_SP = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) arg_BP = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) arg_SI = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) arg_DI = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) arg_R8 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) arg_R9 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) arg_R10 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) arg_R11 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) arg_R12 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) arg_R13 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) arg_R14 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) arg_R15 = 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static unsigned char *get_reg_w8(int no, int rex, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) unsigned char *rv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) switch (no) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) case arg_AL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) rv = (unsigned char *)®s->ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) case arg_BL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) rv = (unsigned char *)®s->bx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) case arg_CL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) rv = (unsigned char *)®s->cx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case arg_DL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) rv = (unsigned char *)®s->dx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case arg_R8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) rv = (unsigned char *)®s->r8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) case arg_R9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) rv = (unsigned char *)®s->r9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) case arg_R10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) rv = (unsigned char *)®s->r10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) case arg_R11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) rv = (unsigned char *)®s->r11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) case arg_R12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) rv = (unsigned char *)®s->r12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) case arg_R13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) rv = (unsigned char *)®s->r13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) case arg_R14:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) rv = (unsigned char *)®s->r14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) case arg_R15:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) rv = (unsigned char *)®s->r15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (rex) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * If REX prefix exists, access low bytes of SI etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * instead of AH etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) switch (no) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) case arg_SI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) rv = (unsigned char *)®s->si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) case arg_DI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) rv = (unsigned char *)®s->di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) case arg_BP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) rv = (unsigned char *)®s->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) case arg_SP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) rv = (unsigned char *)®s->sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) switch (no) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) case arg_AH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) rv = 1 + (unsigned char *)®s->ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) case arg_BH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) rv = 1 + (unsigned char *)®s->bx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) case arg_CH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) rv = 1 + (unsigned char *)®s->cx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case arg_DH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) rv = 1 + (unsigned char *)®s->dx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (!rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) printk(KERN_ERR "mmiotrace: Error reg no# %d\n", no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static unsigned long *get_reg_w32(int no, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) unsigned long *rv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) switch (no) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) case arg_AX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) rv = ®s->ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case arg_BX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) rv = ®s->bx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case arg_CX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) rv = ®s->cx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) case arg_DX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) rv = ®s->dx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) case arg_SP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rv = ®s->sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) case arg_BP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) rv = ®s->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) case arg_SI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) rv = ®s->si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) case arg_DI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) rv = ®s->di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) case arg_R8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) rv = ®s->r8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) case arg_R9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) rv = ®s->r9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) case arg_R10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) rv = ®s->r10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) case arg_R11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) rv = ®s->r11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case arg_R12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) rv = ®s->r12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) case arg_R13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) rv = ®s->r13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case arg_R14:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) rv = ®s->r14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) case arg_R15:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) rv = ®s->r15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) printk(KERN_ERR "mmiotrace: Error reg no# %d\n", no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) unsigned long get_ins_reg_val(unsigned long ins_addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct prefix_bits prf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) p = (unsigned char *)ins_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) p += skip_prefix(p, &prf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) p += get_opcode(p, &opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) for (i = 0; i < ARRAY_SIZE(reg_rop); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (reg_rop[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) goto do_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) for (i = 0; i < ARRAY_SIZE(reg_wop); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (reg_wop[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) goto do_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) printk(KERN_ERR "mmiotrace: Not a register instruction, opcode "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) "0x%02x\n", opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) do_work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) /* for STOS, source register is fixed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (opcode == 0xAA || opcode == 0xAB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) reg = arg_AX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) unsigned char mod_rm = *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) reg = ((mod_rm >> 3) & 0x7) | (prf.rexr << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) switch (get_ins_reg_width(ins_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return *get_reg_w8(reg, prf.rex, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return *(unsigned short *)get_reg_w32(reg, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return *(unsigned int *)get_reg_w32(reg, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return *(unsigned long *)get_reg_w32(reg, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) printk(KERN_ERR "mmiotrace: Error width# %d\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) unsigned long get_ins_imm_val(unsigned long ins_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) unsigned char mod_rm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) unsigned char mod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) struct prefix_bits prf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) p = (unsigned char *)ins_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) p += skip_prefix(p, &prf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) p += get_opcode(p, &opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) for (i = 0; i < ARRAY_SIZE(imm_wop); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (imm_wop[i] == opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) goto do_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) printk(KERN_ERR "mmiotrace: Not an immediate instruction, opcode "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) "0x%02x\n", opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) do_work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) mod_rm = *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) mod = mod_rm >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) p++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) switch (mod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* if r/m is 5 we have a 32 disp (IA32 Manual 3, Table 2-2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* AMD64: XXX Check for address size prefix? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if ((mod_rm & 0x7) == 0x5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) p += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) p += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) p += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) printk(KERN_ERR "mmiotrace: not a memory access instruction "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) "at 0x%lx, rm_mod=0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ins_addr, mod_rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) switch (get_ins_reg_width(ins_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return *(unsigned char *)p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return *(unsigned short *)p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return *(unsigned int *)p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #ifdef __amd64__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return *(unsigned long *)p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) printk(KERN_ERR "mmiotrace: Error: width.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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