^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AMD NUMA support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Discover the memory map and associated nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This version reads it directly from the AMD northbridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright 2002,2003 Andi Kleen, SuSE Labs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/nodemask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pci_ids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mmzone.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/e820/api.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/pci-direct.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/numa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mpspec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/amd_nb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static unsigned char __initdata nodeids[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static __init int find_northbridge(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) for (num = 0; num < 32; num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) header = read_pci_config(0, num, 0, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) header = read_pci_config(0, num, 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int __init amd_numa_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u64 start = PFN_PHYS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u64 end = PFN_PHYS(max_pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned numnodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u64 prevbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int i, j, nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 nodeid, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int bits, cores, apicid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (!early_pci_allowed())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) nb = find_northbridge();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (nb < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) reg = read_pci_config(0, nb, 0, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) numnodes = ((reg >> 4) & 0xF) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (numnodes <= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pr_info("Number of physical nodes %d\n", numnodes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) prevbase = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u64 base, limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) base = read_pci_config(0, nb, 1, 0x40 + i*8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) limit = read_pci_config(0, nb, 1, 0x44 + i*8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) nodeids[i] = nodeid = limit & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if ((base & 3) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (i < numnodes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pr_info("Skipping disabled node %d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (nodeid >= numnodes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) base, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (!limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pr_info("Skipping node entry %d (base %Lx)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) i, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if ((base >> 8) & 3 || (limit >> 8) & 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pr_err("Node %d using interleaving mode %Lx/%Lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) nodeid, (base >> 8) & 3, (limit >> 8) & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (node_isset(nodeid, numa_nodes_parsed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pr_info("Node %d already present, skipping\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) nodeid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) limit >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) limit++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) limit <<= 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (limit > end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) limit = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (limit <= base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) base >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) base <<= 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (base < start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) base = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (limit > end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) limit = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (limit == base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pr_err("Empty node %d\n", nodeid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (limit < base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) pr_err("Node %d bogus settings %Lx-%Lx.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) nodeid, base, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Could sort here, but pun for now. Should not happen anyroads. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (prevbase > base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) pr_err("Node map not sorted %Lx,%Lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) prevbase, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) nodeid, base, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) prevbase = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) numa_add_memblk(nodeid, base, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) node_set(nodeid, numa_nodes_parsed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (!nodes_weight(numa_nodes_parsed))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * We seem to have valid NUMA configuration. Map apicids to nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * using the coreid bits from early_identify_cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) bits = boot_cpu_data.x86_coreid_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) cores = 1 << bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) apicid_base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * get boot-time SMP configuration:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) early_get_smp_config();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (boot_cpu_physical_apicid > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) apicid_base = boot_cpu_physical_apicid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) for_each_node_mask(i, numa_nodes_parsed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) for (j = apicid_base; j < cores + apicid_base; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) set_apicid_to_node((i << bits) + j, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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