Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*---------------------------------------------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  |  status_w.h                                                               |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  |                                                                           |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  | Copyright (C) 1992,1993                                                   |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  |                       Australia.  E-mail   billm@vaxc.cc.monash.edu.au    |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  |                                                                           |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  +---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _STATUS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _STATUS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "fpu_emu.h"		/* for definition of PECULIAR_486 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifdef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define	Const__(x)	$##x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define	Const__(x)	x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SW_Backward    	Const__(0x8000)	/* backward compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SW_C3		Const__(0x4000)	/* condition bit 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SW_Top		Const__(0x3800)	/* top of stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SW_Top_Shift 	Const__(11)	/* shift for top of stack bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SW_C2		Const__(0x0400)	/* condition bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SW_C1		Const__(0x0200)	/* condition bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SW_C0		Const__(0x0100)	/* condition bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SW_Summary     	Const__(0x0080)	/* exception summary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SW_Stack_Fault	Const__(0x0040)	/* stack fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SW_Precision   	Const__(0x0020)	/* loss of precision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SW_Underflow   	Const__(0x0010)	/* underflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SW_Overflow    	Const__(0x0008)	/* overflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SW_Zero_Div    	Const__(0x0004)	/* divide by zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define SW_Denorm_Op   	Const__(0x0002)	/* denormalized operand */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SW_Invalid     	Const__(0x0001)	/* invalid operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SW_Exc_Mask     Const__(0x27f)	/* Status word exception bit mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define COMP_A_gt_B	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define COMP_A_eq_B	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define COMP_A_lt_B	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define COMP_No_Comp	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define COMP_Denormal   0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define COMP_NaN	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define COMP_SNaN	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define status_word() \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)   ((partial_status & ~SW_Top & 0xffff) | ((top << SW_Top_Shift) & SW_Top))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline void setcc(int cc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	partial_status &= ~(SW_C0 | SW_C1 | SW_C2 | SW_C3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	partial_status |= (cc) & (SW_C0 | SW_C1 | SW_C2 | SW_C3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #ifdef PECULIAR_486
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)    /* Default, this conveys no information, but an 80486 does it. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)    /* Clear the SW_C1 bit, "other bits undefined". */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #  define clear_C1()  { partial_status &= ~SW_C1; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) # else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #  define clear_C1()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif /* PECULIAR_486 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif /* _STATUS_H_ */