^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) .file "shr_Xsig.S"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /*---------------------------------------------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) | shr_Xsig.S |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) | 12 byte right shift function |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) | Copyright (C) 1992,1994,1995 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) | Australia. E-mail billm@jacobi.maths.monash.edu.au |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) | Call from C as: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) | void shr_Xsig(Xsig *arg, unsigned nr) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) | Extended shift right function. |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) | Fastest for small shifts. |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) | Shifts the 12 byte quantity pointed to by the first arg (arg) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) | right by the number of bits specified by the second arg (nr). |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) +---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "fpu_emu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SYM_FUNC_START(shr_Xsig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) push %ebp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) movl %esp,%ebp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) pushl %esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) movl PARAM2,%ecx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) movl PARAM1,%esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cmpl $32,%ecx /* shrd only works for 0..31 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) jnc L_more_than_31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* less than 32 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) pushl %ebx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) movl (%esi),%eax /* lsl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) movl 4(%esi),%ebx /* midl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) movl 8(%esi),%edx /* msl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) shrd %cl,%ebx,%eax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) shrd %cl,%edx,%ebx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) shr %cl,%edx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) movl %eax,(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) movl %ebx,4(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) movl %edx,8(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) popl %ebx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) popl %esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) L_more_than_31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) cmpl $64,%ecx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) jnc L_more_than_63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) subb $32,%cl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) movl 4(%esi),%eax /* midl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) movl 8(%esi),%edx /* msl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) shrd %cl,%edx,%eax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) shr %cl,%edx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) movl %eax,(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) movl %edx,4(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) movl $0,8(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) popl %esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) L_more_than_63:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) cmpl $96,%ecx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) jnc L_more_than_95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) subb $64,%cl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) movl 8(%esi),%eax /* msl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) shr %cl,%eax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) xorl %edx,%edx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) movl %eax,(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) movl %edx,4(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) movl %edx,8(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) popl %esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) L_more_than_95:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) xorl %eax,%eax
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) movl %eax,(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) movl %eax,4(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) movl %eax,8(%esi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) popl %esi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) SYM_FUNC_END(shr_Xsig)