^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*---------------------------------------------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) | get_address.c |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) | Get the effective address from an FPU instruction. |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) | Copyright (C) 1992,1993,1994,1997 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) | Australia. E-mail billm@suburbia.net |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) +---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*---------------------------------------------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) | Note: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) | The file contains code which accesses user memory. |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) | Emulator static data may change when user memory is accessed, due to |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) | other processes using the emulator while swapping is in progress. |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) +---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/vm86.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "fpu_system.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "exception.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "fpu_emu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define FPU_WRITE_BIT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int reg_offset[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) offsetof(struct pt_regs, ax),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) offsetof(struct pt_regs, cx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) offsetof(struct pt_regs, dx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) offsetof(struct pt_regs, bx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) offsetof(struct pt_regs, sp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) offsetof(struct pt_regs, bp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) offsetof(struct pt_regs, si),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) offsetof(struct pt_regs, di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define REG_(x) (*(long *)(reg_offset[(x)] + (u_char *)FPU_info->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int reg_offset_vm86[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) offsetof(struct pt_regs, cs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) offsetof(struct kernel_vm86_regs, ds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) offsetof(struct kernel_vm86_regs, es),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) offsetof(struct kernel_vm86_regs, fs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) offsetof(struct kernel_vm86_regs, gs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) offsetof(struct pt_regs, ss),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) offsetof(struct kernel_vm86_regs, ds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define VM86_REG_(x) (*(unsigned short *) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) (reg_offset_vm86[((unsigned)x)] + (u_char *)FPU_info->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int reg_offset_pm[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) offsetof(struct pt_regs, cs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) offsetof(struct pt_regs, ds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) offsetof(struct pt_regs, es),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) offsetof(struct pt_regs, fs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) offsetof(struct pt_regs, ds), /* dummy, not saved on stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) offsetof(struct pt_regs, ss),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) offsetof(struct pt_regs, ds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PM_REG_(x) (*(unsigned short *) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) (reg_offset_pm[((unsigned)x)] + (u_char *)FPU_info->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Decode the SIB byte. This function assumes mod != 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int sib(int mod, unsigned long *fpu_eip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u_char ss, index, base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) long offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) FPU_code_access_ok(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) FPU_get_user(base, (u_char __user *) (*fpu_eip)); /* The SIB byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) (*fpu_eip)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ss = base >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) index = (base >> 3) & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) base &= 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if ((mod == 0) && (base == 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) offset = 0; /* No base register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) offset = REG_(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (index == 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* No index register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* A non-zero ss is illegal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (ss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) EXCEPTION(EX_Invalid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) offset += (REG_(index)) << ss;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (mod == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* 8 bit signed displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) long displacement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) FPU_code_access_ok(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) FPU_get_user(displacement, (signed char __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) offset += displacement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) (*fpu_eip)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) } else if (mod == 2 || base == 5) { /* The second condition also has mod==0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* 32 bit displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) long displacement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) FPU_code_access_ok(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) FPU_get_user(displacement, (long __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) offset += displacement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) (*fpu_eip) += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static unsigned long vm86_segment(u_char segment, struct address *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) segment--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #ifdef PARANOID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (segment > PREFIX_SS_) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) EXCEPTION(EX_INTERNAL | 0x130);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) math_abort(FPU_info, SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #endif /* PARANOID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) addr->selector = VM86_REG_(segment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return (unsigned long)VM86_REG_(segment) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* This should work for 16 and 32 bit protected mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static long pm_address(u_char FPU_modrm, u_char segment,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct address *addr, long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct desc_struct descriptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned long base_address, limit, address, seg_top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) segment--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #ifdef PARANOID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* segment is unsigned, so this also detects if segment was 0: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (segment > PREFIX_SS_) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) EXCEPTION(EX_INTERNAL | 0x132);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) math_abort(FPU_info, SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #endif /* PARANOID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) switch (segment) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) case PREFIX_GS_ - 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* user gs handling can be lazy, use special accessors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) addr->selector = get_user_gs(FPU_info->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) addr->selector = PM_REG_(segment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) descriptor = FPU_get_ldt_descriptor(addr->selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) base_address = seg_get_base(&descriptor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) address = base_address + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) limit = seg_get_limit(&descriptor) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) limit *= seg_get_granularity(&descriptor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) limit += base_address - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (limit < base_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) limit = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (seg_expands_down(&descriptor)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (descriptor.g) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) seg_top = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) seg_top = base_address + (1 << 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (seg_top < base_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) seg_top = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) access_limit =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) (address <= limit) || (address >= seg_top) ? 0 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ((seg_top - address) >= 255 ? 255 : seg_top - address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) access_limit =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) (address > limit) || (address < base_address) ? 0 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ((limit - address) >= 254 ? 255 : limit - address + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (seg_execute_only(&descriptor) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) (!seg_writable(&descriptor) && (FPU_modrm & FPU_WRITE_BIT))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) access_limit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MOD R/M byte: MOD == 3 has a special use for the FPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) SIB byte used iff R/M = 100b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ..... ......... .........
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MOD OPCODE(2) R/M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SIB byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ..... ......... .........
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) SS INDEX BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) void __user *FPU_get_address(u_char FPU_modrm, unsigned long *fpu_eip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct address *addr, fpu_addr_modes addr_modes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u_char mod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned rm = FPU_modrm & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) long *cpu_reg_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int address = 0; /* Initialized just to stop compiler warnings. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* Memory accessed via the cs selector is write protected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) in `non-segmented' 32 bit protected mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) && (addr_modes.override.segment == PREFIX_CS_)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) math_abort(FPU_info, SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) mod = (FPU_modrm >> 6) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (rm == 4 && mod != 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) address = sib(mod, fpu_eip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) cpu_reg_ptr = ®_(rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) switch (mod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (rm == 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Special case: disp32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) FPU_code_access_ok(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) FPU_get_user(address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) (unsigned long __user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) (*fpu_eip) += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) addr->offset = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return (void __user *)address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) address = *cpu_reg_ptr; /* Just return the contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) of the cpu register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) addr->offset = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return (void __user *)address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* 8 bit signed displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) FPU_code_access_ok(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) FPU_get_user(address, (signed char __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) (*fpu_eip)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* 32 bit displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) FPU_code_access_ok(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) FPU_get_user(address, (long __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) (*fpu_eip) += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* Not legal for the FPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) EXCEPTION(EX_Invalid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) address += *cpu_reg_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) addr->offset = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) switch (addr_modes.default_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) case VM86:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) address += vm86_segment(addr_modes.override.segment, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) case PM16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case SEG32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) address = pm_address(FPU_modrm, addr_modes.override.segment,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) addr, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) EXCEPTION(EX_INTERNAL | 0x133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return (void __user *)address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct address *addr, fpu_addr_modes addr_modes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u_char mod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) unsigned rm = FPU_modrm & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int address = 0; /* Default used for mod == 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* Memory accessed via the cs selector is write protected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) in `non-segmented' 32 bit protected mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) && (addr_modes.override.segment == PREFIX_CS_)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) math_abort(FPU_info, SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) mod = (FPU_modrm >> 6) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) switch (mod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (rm == 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Special case: disp16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) FPU_code_access_ok(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) FPU_get_user(address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) (unsigned short __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) (*fpu_eip) += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) goto add_segment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* 8 bit signed displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) FPU_code_access_ok(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) FPU_get_user(address, (signed char __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) (*fpu_eip)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* 16 bit displacement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) RE_ENTRANT_CHECK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) FPU_code_access_ok(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) FPU_get_user(address, (unsigned short __user *)(*fpu_eip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) (*fpu_eip) += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) RE_ENTRANT_CHECK_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Not legal for the FPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) EXCEPTION(EX_Invalid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) switch (rm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) address += FPU_info->regs->bx + FPU_info->regs->si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) address += FPU_info->regs->bx + FPU_info->regs->di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) address += FPU_info->regs->bp + FPU_info->regs->si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (addr_modes.override.segment == PREFIX_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) addr_modes.override.segment = PREFIX_SS_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) address += FPU_info->regs->bp + FPU_info->regs->di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (addr_modes.override.segment == PREFIX_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) addr_modes.override.segment = PREFIX_SS_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) address += FPU_info->regs->si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) address += FPU_info->regs->di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) address += FPU_info->regs->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (addr_modes.override.segment == PREFIX_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) addr_modes.override.segment = PREFIX_SS_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) address += FPU_info->regs->bx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) add_segment:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) address &= 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) addr->offset = address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) switch (addr_modes.default_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) case VM86:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) address += vm86_segment(addr_modes.override.segment, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) case PM16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) case SEG32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) address = pm_address(FPU_modrm, addr_modes.override.segment,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) addr, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) EXCEPTION(EX_INTERNAL | 0x131);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return (void __user *)address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }