Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef __KVM_X86_VMX_CAPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define __KVM_X86_VMX_CAPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <asm/vmx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include "lapic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) extern bool __read_mostly enable_vpid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) extern bool __read_mostly flexpriority_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) extern bool __read_mostly enable_ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) extern bool __read_mostly enable_unrestricted_guest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) extern bool __read_mostly enable_ept_ad_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) extern bool __read_mostly enable_pml;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) extern bool __read_mostly enable_apicv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) extern int __read_mostly pt_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define PT_MODE_SYSTEM		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define PT_MODE_HOST_GUEST	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define PMU_CAP_FW_WRITES	(1ULL << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) struct nested_vmx_msrs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	 * We only store the "true" versions of the VMX capability MSRs. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	 * generate the "non-true" versions by setting the must-be-1 bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	 * according to the SDM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	u32 procbased_ctls_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u32 procbased_ctls_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u32 secondary_ctls_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	u32 secondary_ctls_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	u32 pinbased_ctls_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	u32 pinbased_ctls_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	u32 exit_ctls_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 exit_ctls_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32 entry_ctls_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u32 entry_ctls_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	u32 misc_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	u32 misc_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u32 ept_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32 vpid_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u64 basic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u64 cr0_fixed0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u64 cr0_fixed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	u64 cr4_fixed0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	u64 cr4_fixed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u64 vmcs_enum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u64 vmfunc_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) struct vmcs_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	int order;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 basic_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u32 revision_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u32 pin_based_exec_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 cpu_based_exec_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 cpu_based_2nd_exec_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u32 vmexit_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	u32 vmentry_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct nested_vmx_msrs nested;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) extern struct vmcs_config vmcs_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct vmx_capability {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u32 ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u32 vpid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) extern struct vmx_capability vmx_capability;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static inline bool cpu_has_vmx_basic_inout(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	return	(((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static inline bool cpu_has_virtual_nmis(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static inline bool cpu_has_vmx_preemption_timer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return vmcs_config.pin_based_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		PIN_BASED_VMX_PREEMPTION_TIMER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static inline bool cpu_has_vmx_posted_intr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static inline bool cpu_has_load_ia32_efer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline bool cpu_has_load_perf_global_ctrl(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline bool cpu_has_vmx_mpx(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static inline bool cpu_has_vmx_tpr_shadow(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static inline bool cpu_has_vmx_msr_bitmap(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static inline bool cpu_has_secondary_exec_ctrls(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return vmcs_config.cpu_based_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static inline bool cpu_has_vmx_ept(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		SECONDARY_EXEC_ENABLE_EPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static inline bool vmx_umip_emulated(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		SECONDARY_EXEC_DESC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static inline bool cpu_has_vmx_rdtscp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		SECONDARY_EXEC_ENABLE_RDTSCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static inline bool cpu_has_vmx_vpid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		SECONDARY_EXEC_ENABLE_VPID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static inline bool cpu_has_vmx_wbinvd_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		SECONDARY_EXEC_WBINVD_EXITING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static inline bool cpu_has_vmx_unrestricted_guest(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		SECONDARY_EXEC_UNRESTRICTED_GUEST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static inline bool cpu_has_vmx_apic_register_virt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		SECONDARY_EXEC_APIC_REGISTER_VIRT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline bool cpu_has_vmx_virtual_intr_delivery(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static inline bool cpu_has_vmx_ple(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		SECONDARY_EXEC_PAUSE_LOOP_EXITING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static inline bool cpu_has_vmx_rdrand(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		SECONDARY_EXEC_RDRAND_EXITING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static inline bool cpu_has_vmx_invpcid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		SECONDARY_EXEC_ENABLE_INVPCID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static inline bool cpu_has_vmx_vmfunc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		SECONDARY_EXEC_ENABLE_VMFUNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static inline bool cpu_has_vmx_shadow_vmcs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	u64 vmx_msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* check if the cpu supports writing r/o exit information fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		SECONDARY_EXEC_SHADOW_VMCS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static inline bool cpu_has_vmx_encls_vmexit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		SECONDARY_EXEC_ENCLS_EXITING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static inline bool cpu_has_vmx_rdseed(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		SECONDARY_EXEC_RDSEED_EXITING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static inline bool cpu_has_vmx_pml(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline bool cpu_has_vmx_xsaves(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		SECONDARY_EXEC_XSAVES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static inline bool cpu_has_vmx_waitpkg(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static inline bool cpu_has_vmx_tsc_scaling(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	return vmcs_config.cpu_based_2nd_exec_ctrl &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		SECONDARY_EXEC_TSC_SCALING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static inline bool cpu_has_vmx_apicv(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	return cpu_has_vmx_apic_register_virt() &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		cpu_has_vmx_virtual_intr_delivery() &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		cpu_has_vmx_posted_intr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static inline bool cpu_has_vmx_flexpriority(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return cpu_has_vmx_tpr_shadow() &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		cpu_has_vmx_virtualize_apic_accesses();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static inline bool cpu_has_vmx_ept_execute_only(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static inline bool cpu_has_vmx_ept_4levels(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static inline bool cpu_has_vmx_ept_5levels(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static inline bool cpu_has_vmx_ept_mt_wb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	return vmx_capability.ept & VMX_EPTP_WB_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static inline bool cpu_has_vmx_ept_2m_page(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static inline bool cpu_has_vmx_ept_1g_page(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static inline bool cpu_has_vmx_ept_ad_bits(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	return vmx_capability.ept & VMX_EPT_AD_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static inline bool cpu_has_vmx_invept_context(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static inline bool cpu_has_vmx_invept_global(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static inline bool cpu_has_vmx_invvpid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static inline bool cpu_has_vmx_invvpid_individual_addr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static inline bool cpu_has_vmx_invvpid_single(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static inline bool cpu_has_vmx_invvpid_global(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static inline bool cpu_has_vmx_intel_pt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	u64 vmx_msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		(vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		(vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_IA32_RTIT_CTL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)  * Processor Trace can operate in one of three modes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)  *  a. system-wide: trace both host/guest and output to host buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)  *  b. host-only:   only trace host and output to host buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)  *  c. host-guest:  trace host and guest simultaneously and output to their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)  *                  respective buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)  * KVM currently only supports (a) and (c).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static inline bool vmx_pt_mode_is_system(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	return pt_mode == PT_MODE_SYSTEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static inline bool vmx_pt_mode_is_host_guest(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	return pt_mode == PT_MODE_HOST_GUEST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static inline u64 vmx_get_perf_capabilities(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	 * Since counters are virtualized, KVM would support full
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	 * width counting unconditionally, even if the host lacks it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	return PMU_CAP_FW_WRITES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #endif /* __KVM_X86_VMX_CAPS_H */