^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * vMTRR implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006 Qumranet, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2010 Red Hat, Inc. and/or its affiliates.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright(C) 2015 Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Yaniv Kamay <yaniv@qumranet.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Avi Kivity <avi@qumranet.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Marcelo Tosatti <mtosatti@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Paolo Bonzini <pbonzini@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Xiao Guangrong <guangrong.xiao@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kvm_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mtrr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "cpuid.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "mmu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define IA32_MTRR_DEF_TYPE_E (1ULL << 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define IA32_MTRR_DEF_TYPE_FE (1ULL << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static bool msr_mtrr_valid(unsigned msr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) switch (msr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case MSR_MTRRfix64K_00000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case MSR_MTRRfix16K_80000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) case MSR_MTRRfix16K_A0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case MSR_MTRRfix4K_C0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case MSR_MTRRfix4K_C8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) case MSR_MTRRfix4K_D0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case MSR_MTRRfix4K_D8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case MSR_MTRRfix4K_E0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) case MSR_MTRRfix4K_E8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) case MSR_MTRRfix4K_F0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case MSR_MTRRfix4K_F8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) case MSR_MTRRdefType:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) case MSR_IA32_CR_PAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static bool valid_mtrr_type(unsigned t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u64 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (!msr_mtrr_valid(msr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (msr == MSR_IA32_CR_PAT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return kvm_pat_valid(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else if (msr == MSR_MTRRdefType) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (data & ~0xcff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return valid_mtrr_type(data & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) for (i = 0; i < 8 ; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* variable MTRRs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if ((msr & 1) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* MTRR base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (!valid_mtrr_type(data & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) mask |= 0xf00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* MTRR mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) mask |= 0x7ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (data & mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) kvm_inject_gp(vcpu, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static u8 mtrr_disabled_type(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * Intel SDM 11.11.2.2: all MTRRs are disabled when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * memory type is applied to all of physical memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * However, virtual machines can be run with CPUID such that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * there are no MTRRs. In that case, the firmware will never
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * enable MTRRs and it is obviously undesirable to run the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * guest entirely with UC memory and we use WB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (guest_cpuid_has(vcpu, X86_FEATURE_MTRR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return MTRR_TYPE_UNCACHABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return MTRR_TYPE_WRBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * Three terms are used in the following code:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * - segment, it indicates the address segments covered by fixed MTRRs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * - unit, it corresponds to the MSR entry in the segment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * - range, a range is covered in one memory cache type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct fixed_mtrr_segment {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) u64 start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u64 end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int range_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* the start position in kvm_mtrr.fixed_ranges[]. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int range_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static struct fixed_mtrr_segment fixed_seg_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .start = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .end = 0x80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .range_shift = 16, /* 64K */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .range_start = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * 16K fixed mtrr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .start = 0x80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .end = 0xc0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .range_shift = 14, /* 16K */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .range_start = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * 4K fixed mtrr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .start = 0xc0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .end = 0x100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .range_shift = 12, /* 12K */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .range_start = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * The size of unit is covered in one MSR, one MSR entry contains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * 8 ranges so that unit size is always 8 * 2^range_shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static u64 fixed_mtrr_seg_unit_size(int seg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return 8 << fixed_seg_table[seg].range_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) switch (msr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) case MSR_MTRRfix64K_00000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) *seg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) *unit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) *seg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) *unit = array_index_nospec(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) msr - MSR_MTRRfix16K_80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MSR_MTRRfix16K_A0000 - MSR_MTRRfix16K_80000 + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *seg = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *unit = array_index_nospec(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) msr - MSR_MTRRfix4K_C0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MSR_MTRRfix4K_F8000 - MSR_MTRRfix4K_C0000 + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u64 unit_size = fixed_mtrr_seg_unit_size(seg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *start = mtrr_seg->start + unit * unit_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) *end = *start + unit_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) WARN_ON(*end > mtrr_seg->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int fixed_mtrr_seg_unit_range_index(int seg, int unit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) WARN_ON(mtrr_seg->start + unit * fixed_mtrr_seg_unit_size(seg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) > mtrr_seg->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* each unit has 8 ranges. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return mtrr_seg->range_start + 8 * unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int fixed_mtrr_seg_end_range_index(int seg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) n = (mtrr_seg->end - mtrr_seg->start) >> mtrr_seg->range_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return mtrr_seg->range_start + n - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int seg, unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) fixed_mtrr_seg_unit_range(seg, unit, start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int fixed_msr_to_range_index(u32 msr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) int seg, unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return fixed_mtrr_seg_unit_range_index(seg, unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int fixed_mtrr_addr_to_seg(u64 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct fixed_mtrr_segment *mtrr_seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int seg, seg_num = ARRAY_SIZE(fixed_seg_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) for (seg = 0; seg < seg_num; seg++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (mtrr_seg->start <= addr && addr < mtrr_seg->end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct fixed_mtrr_segment *mtrr_seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) index = mtrr_seg->range_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) index += (addr - mtrr_seg->start) >> mtrr_seg->range_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static u64 fixed_mtrr_range_end_addr(int seg, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int pos = index - mtrr_seg->range_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return mtrr_seg->start + ((pos + 1) << mtrr_seg->range_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u64 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) *start = range->base & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) mask = range->mask & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* This cannot overflow because writing to the reserved bits of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * variable MTRRs causes a #GP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) *end = (*start | ~mask) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) gfn_t start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) !kvm_arch_has_noncoherent_dma(vcpu->kvm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* fixed MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (fixed_msr_to_range(msr, &start, &end)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (!fixed_mtrr_is_enabled(mtrr_state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) } else if (msr == MSR_MTRRdefType) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) start = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) end = ~0ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* variable range MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) index = (msr - 0x200) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) var_mtrr_range(&mtrr_state->var_ranges[index], &start, &end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return (range->mask & (1 << 11)) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct kvm_mtrr_range *tmp, *cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int index, is_mtrr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) index = (msr - 0x200) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) is_mtrr_mask = msr - 0x200 - 2 * index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) cur = &mtrr_state->var_ranges[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* remove the entry if it's in the list. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (var_mtrr_range_is_valid(cur))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) list_del(&mtrr_state->var_ranges[index].node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* Extend the mask with all 1 bits to the left, since those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * bits must implicitly be 0. The bits are then cleared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * when reading them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (!is_mtrr_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) cur->base = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) cur->mask = data | (-1LL << cpuid_maxphyaddr(vcpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* add it to the list if it's enabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (var_mtrr_range_is_valid(cur)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) list_for_each_entry(tmp, &mtrr_state->head, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (cur->base >= tmp->base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) list_add_tail(&cur->node, &tmp->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (!kvm_mtrr_valid(vcpu, msr, data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) index = fixed_msr_to_range_index(msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (index >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) else if (msr == MSR_MTRRdefType)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) vcpu->arch.mtrr_state.deftype = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) else if (msr == MSR_IA32_CR_PAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) vcpu->arch.pat = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) set_var_mtrr_msr(vcpu, msr, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) update_mtrr(vcpu, msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /* MSR_MTRRcap is a readonly MSR. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (msr == MSR_MTRRcap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * SMRR = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * WC = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * FIX = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * VCNT = KVM_NR_VAR_MTRR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) *pdata = 0x500 | KVM_NR_VAR_MTRR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (!msr_mtrr_valid(msr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) index = fixed_msr_to_range_index(msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (index >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) *pdata = *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) else if (msr == MSR_MTRRdefType)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) *pdata = vcpu->arch.mtrr_state.deftype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) else if (msr == MSR_IA32_CR_PAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) *pdata = vcpu->arch.pat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) else { /* Variable MTRRs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) int is_mtrr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) index = (msr - 0x200) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) is_mtrr_mask = msr - 0x200 - 2 * index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (!is_mtrr_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) *pdata = vcpu->arch.mtrr_state.var_ranges[index].base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *pdata = vcpu->arch.mtrr_state.var_ranges[index].mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) *pdata &= (1ULL << cpuid_maxphyaddr(vcpu)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) INIT_LIST_HEAD(&vcpu->arch.mtrr_state.head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct mtrr_iter {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* input fields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) struct kvm_mtrr *mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u64 start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) u64 end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* output fields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int mem_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /* mtrr is completely disabled? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) bool mtrr_disabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* [start, end) is not fully covered in MTRRs? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) bool partial_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* private fields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* used for fixed MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) int seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /* used for var MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct kvm_mtrr_range *range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* max address has been covered in var MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u64 start_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) bool fixed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) int seg, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (!fixed_mtrr_is_enabled(iter->mtrr_state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) seg = fixed_mtrr_addr_to_seg(iter->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (seg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) iter->fixed = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) index = fixed_mtrr_addr_seg_to_range_index(iter->start, seg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) iter->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) iter->seg = seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static bool match_var_range(struct mtrr_iter *iter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct kvm_mtrr_range *range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) u64 start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) var_mtrr_range(range, &start, &end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (!(start >= iter->end || end <= iter->start)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) iter->range = range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * the function is called when we do kvm_mtrr.head walking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * Range has the minimum base address which interleaves
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * [looker->start_max, looker->end).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) iter->partial_map |= iter->start_max < start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* update the max address has been covered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) iter->start_max = max(iter->start_max, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static void __mtrr_lookup_var_next(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) struct kvm_mtrr *mtrr_state = iter->mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) list_for_each_entry_continue(iter->range, &mtrr_state->head, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (match_var_range(iter, iter->range))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) iter->range = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) iter->partial_map |= iter->start_max < iter->end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static void mtrr_lookup_var_start(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct kvm_mtrr *mtrr_state = iter->mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) iter->fixed = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) iter->start_max = iter->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) iter->range = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) iter->range = list_prepare_entry(iter->range, &mtrr_state->head, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) __mtrr_lookup_var_next(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static void mtrr_lookup_fixed_next(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /* terminate the lookup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (fixed_mtrr_range_end_addr(iter->seg, iter->index) >= iter->end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) iter->fixed = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) iter->range = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) iter->index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) /* have looked up for all fixed MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (iter->index >= ARRAY_SIZE(iter->mtrr_state->fixed_ranges))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return mtrr_lookup_var_start(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /* switch to next segment. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (iter->index > fixed_mtrr_seg_end_range_index(iter->seg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) iter->seg++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) static void mtrr_lookup_var_next(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) __mtrr_lookup_var_next(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static void mtrr_lookup_start(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (!mtrr_is_enabled(iter->mtrr_state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) iter->mtrr_disabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (!mtrr_lookup_fixed_start(iter))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) mtrr_lookup_var_start(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static void mtrr_lookup_init(struct mtrr_iter *iter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) struct kvm_mtrr *mtrr_state, u64 start, u64 end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) iter->mtrr_state = mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) iter->start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) iter->end = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) iter->mtrr_disabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) iter->partial_map = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) iter->fixed = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) iter->range = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) mtrr_lookup_start(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static bool mtrr_lookup_okay(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (iter->fixed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) iter->mem_type = iter->mtrr_state->fixed_ranges[iter->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (iter->range) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) iter->mem_type = iter->range->base & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) static void mtrr_lookup_next(struct mtrr_iter *iter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (iter->fixed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) mtrr_lookup_fixed_next(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) mtrr_lookup_var_next(iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) #define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct mtrr_iter iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) u64 start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) int type = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) const int wt_wb_mask = (1 << MTRR_TYPE_WRBACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) | (1 << MTRR_TYPE_WRTHROUGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) start = gfn_to_gpa(gfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) end = start + PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) int curr_type = iter.mem_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) * Precedences.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (type == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) type = curr_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * If two or more variable memory ranges match and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * memory types are identical, then that memory type is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) * used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (type == curr_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * If two or more variable memory ranges match and one of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * the memory types is UC, the UC memory type used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (curr_type == MTRR_TYPE_UNCACHABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return MTRR_TYPE_UNCACHABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * If two or more variable memory ranges match and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * memory types are WT and WB, the WT memory type is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (((1 << type) & wt_wb_mask) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ((1 << curr_type) & wt_wb_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) type = MTRR_TYPE_WRTHROUGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * For overlaps not defined by the above rules, processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * behavior is undefined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) /* We use WB for this undefined behavior. :( */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) return MTRR_TYPE_WRBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (iter.mtrr_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return mtrr_disabled_type(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /* not contained in any MTRRs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (type == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return mtrr_default_type(mtrr_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * We just check one page, partially covered by MTRRs is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * impossible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) WARN_ON(iter.partial_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) return type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) int page_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct mtrr_iter iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) u64 start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int type = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) start = gfn_to_gpa(gfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) end = gfn_to_gpa(gfn + page_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (type == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) type = iter.mem_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (type != iter.mem_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (iter.mtrr_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (!iter.partial_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (type == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) return type == mtrr_default_type(mtrr_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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