Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef __KVM_IO_APIC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define __KVM_IO_APIC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/kvm_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <kvm/iodev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include "irq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) struct kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) struct kvm_vcpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define IOAPIC_NUM_PINS  KVM_IOAPIC_NUM_PINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define IOAPIC_VERSION_ID 0x11	/* IOAPIC version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define IOAPIC_EDGE_TRIG  0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define IOAPIC_LEVEL_TRIG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define IOAPIC_DEFAULT_BASE_ADDRESS  0xfec00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define IOAPIC_MEM_LENGTH            0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* Direct registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define IOAPIC_REG_SELECT  0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define IOAPIC_REG_WINDOW  0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Indirect registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define IOAPIC_REG_APIC_ID 0x00	/* x86 IOAPIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define IOAPIC_REG_VERSION 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define IOAPIC_REG_ARB_ID  0x02	/* x86 IOAPIC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /*ioapic delivery mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define	IOAPIC_FIXED			0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define	IOAPIC_LOWEST_PRIORITY		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define	IOAPIC_PMI			0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define	IOAPIC_NMI			0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define	IOAPIC_INIT			0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define	IOAPIC_EXTINT			0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define RTC_GSI 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define RTC_GSI -1U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) struct dest_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	/* vcpu bitmap where IRQ has been sent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	DECLARE_BITMAP(map, KVM_MAX_VCPU_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	 * Vector sent to a given vcpu, only valid when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 * the vcpu's bit in map is set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 vectors[KVM_MAX_VCPU_ID];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) struct rtc_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int pending_eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct dest_map dest_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) union kvm_ioapic_redirect_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u64 bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		u8 vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		u8 delivery_mode:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		u8 dest_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		u8 delivery_status:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		u8 polarity:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		u8 remote_irr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		u8 trig_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		u8 mask:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		u8 reserve:7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		u8 reserved[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		u8 dest_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	} fields;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) struct kvm_ioapic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	u64 base_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	u32 ioregsel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	u32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u32 irr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	unsigned long irq_states[IOAPIC_NUM_PINS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct kvm_io_device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct kvm *kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	void (*ack_notifier)(void *opaque, int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct rtc_status rtc_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct delayed_work eoi_inject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	u32 irq_eoi[IOAPIC_NUM_PINS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	u32 irr_delivered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define ASSERT(x)  							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) do {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!(x)) {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		printk(KERN_EMERG "assertion failed %s: %d: %s\n",	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		       __FILE__, __LINE__, #x);				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		BUG();							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define ASSERT(x) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline int ioapic_in_kernel(struct kvm *kvm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	return irqchip_kernel(kvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			int trigger_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int kvm_ioapic_init(struct kvm *kvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void kvm_ioapic_destroy(struct kvm *kvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		       int level, bool line_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			   ulong *ioapic_handled_vectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			    ulong *ioapic_handled_vectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif