^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * For licencing details see kernel-base/COPYING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/bios_ebda.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/paravirt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/pci_x86.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/mpspec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/e820/api.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/io_apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/hpet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/memtype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/tsc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/mach_traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void x86_init_noop(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __init x86_init_uint_noop(unsigned int unused) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int __init iommu_init_noop(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static void iommu_shutdown_noop(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool __init bool_x86_init_noop(void) { return false; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void x86_op_int_noop(int cpu) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static __init void get_rtc_noop(struct timespec64 *now) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static __initconst const struct of_device_id of_cmos_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { .compatible = "motorola,mc146818" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Allow devicetree configured systems to disable the RTC by setting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * corresponding DT node's status property to disabled. Code is optimized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * out for CONFIG_OF=n builds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static __init void x86_wallclock_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (node && !of_device_is_available(node)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) x86_platform.get_wallclock = get_rtc_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) x86_platform.set_wallclock = set_rtc_noop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * The platform setup functions are preset with the default functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * for standard PC hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct x86_init_ops x86_init __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .resources = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .probe_roms = probe_roms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .reserve_resources = reserve_standard_io_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .memory_setup = e820__memory_setup_default,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .mpparse = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .setup_ioapic_ids = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .find_smp_config = default_find_smp_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .get_smp_config = default_get_smp_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .irqs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .pre_vector_init = init_ISA_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .intr_init = native_init_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .intr_mode_select = apic_intr_mode_select,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .intr_mode_init = apic_intr_mode_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .create_pci_msi_domain = native_create_pci_msi_domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .oem = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .arch_setup = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .banner = default_banner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .paging = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .pagetable_init = native_pagetable_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .timers = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .setup_percpu_clockev = setup_boot_APIC_clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .timer_init = hpet_time_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .wallclock_init = x86_wallclock_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .iommu = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .iommu_init = iommu_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .pci = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .init = x86_default_pci_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .init_irq = x86_default_pci_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .fixup_irqs = x86_default_pci_fixup_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .hyper = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .init_platform = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .guest_late_init = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .x2apic_available = bool_x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .init_mem_mapping = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .init_after_bootmem = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .acpi = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .set_root_pointer = x86_default_set_root_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .get_root_pointer = x86_default_get_root_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .reduced_hw_early_init = acpi_generic_reduced_hw_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct x86_cpuinit_ops x86_cpuinit = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .early_percpu_clock_init = x86_init_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .setup_percpu_clockev = setup_secondary_APIC_clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void default_nmi_init(void) { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct x86_platform_ops x86_platform __ro_after_init = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .calibrate_cpu = native_calibrate_cpu_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .calibrate_tsc = native_calibrate_tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .get_wallclock = mach_get_cmos_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .set_wallclock = mach_set_rtc_mmss,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .iommu_shutdown = iommu_shutdown_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .is_untracked_pat_range = is_ISA_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .nmi_init = default_nmi_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .get_nmi_reason = default_get_nmi_reason,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .save_sched_clock_state = tsc_save_sched_clock_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .restore_sched_clock_state = tsc_restore_sched_clock_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .hyper.pin_vcpu = x86_op_int_noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) EXPORT_SYMBOL_GPL(x86_platform);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #if defined(CONFIG_PCI_MSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct x86_msi_ops x86_msi __ro_after_init = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .restore_msi_irqs = default_restore_msi_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* MSI arch specific hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) void arch_restore_msi_irqs(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) x86_msi.restore_msi_irqs(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct x86_apic_ops x86_apic_ops __ro_after_init = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .io_apic_read = native_io_apic_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .restore = native_restore_boot_irq_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };