^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 1991,1992,1995 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 1994 Alan Modra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 1995 Markus Kuhn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 1996 Ingo Molnar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 1998 Andrea Arcangeli
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 2002,2006 Vojtech Pavlik
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 2003 Andi Kleen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i8253.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/vsyscall.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/x86_init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/i8259.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/hpet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned long profile_pc(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long pc = instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (!user_mode(regs) && in_lock_functions(pc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifdef CONFIG_FRAME_POINTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return *(unsigned long *)(regs->bp + sizeof(long));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long *sp = (unsigned long *)regs->sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Return address is either directly at stack pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * or above a saved flags. Eflags has bits 22-31 zero,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * kernel addresses don't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (sp[0] >> 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return sp[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (sp[1] >> 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return sp[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) EXPORT_SYMBOL(profile_pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Default timer interrupt handler for PIT/HPET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static irqreturn_t timer_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) global_clock_event->event_handler(global_clock_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void __init setup_default_timer_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Unconditionally register the legacy timer interrupt; even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * without legacy PIC/PIT we need this for the HPET0 in legacy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * replacement mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (request_irq(0, timer_interrupt, flags, "timer", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pr_info("Failed to register legacy timer interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Default timer init function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) void __init hpet_time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!hpet_enable()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (!pit_timer_init())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) setup_default_timer_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static __init void x86_late_time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Before PIT/HPET init, select the interrupt mode. This is required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * to make the decision whether PIT should be initialized correct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) x86_init.irqs.intr_mode_select();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Setup the legacy timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) x86_init.timers.timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * After PIT/HPET timers init, set up the final interrupt mode for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * delivering IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) x86_init.irqs.intr_mode_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) tsc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (static_cpu_has(X86_FEATURE_WAITPKG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) use_tpause_delay();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Initialize TSC and delay the periodic timer init to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * late x86_late_time_init() so ioremap works.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __init time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) late_time_init = x86_late_time_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Sanity check the vdso related archdata content.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void clocksource_arch_init(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (cs->mask != CLOCKSOURCE_MASK(64)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cs->name, cs->mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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