^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel SMP support routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (c) 2002,2003 Andi Kleen, SuSE Labs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mtrr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/idtentry.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/nmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/mce.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/trace/irq_vectors.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/kexec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/virtext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Some notes on x86 processor bugs affecting SMP operation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * The Linux implications for SMP are handled as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Pentium III / [Xeon]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * None of the E1AP-E3AP errata are visible to the user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * E1AP. see PII A1AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * E2AP. see PII A2AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * E3AP. see PII A3AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Pentium II / [Xeon]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * None of the A1AP-A3AP errata are visible to the user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * A1AP. see PPro 1AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * A2AP. see PPro 2AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * A3AP. see PPro 7AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Pentium Pro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * None of 1AP-9AP errata are visible to the normal user,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * except occasional delivery of 'spurious interrupt' as trap #15.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * This is very rare and a non-problem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * 1AP. Linux maps APIC as non-cacheable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * 2AP. worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * 3AP. fixed in C0 and above steppings microcode update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Linux does not use excessive STARTUP_IPIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * 4AP. worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * 5AP. symmetric IO mode (normal Linux operation) not affected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * 'noapic' mode has vector 0xf filled out properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * 6AP. 'noapic' mode might be affected - fixed in later steppings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * 7AP. We do not assume writes to the LVT deassering IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * 8AP. We do not enable low power mode (deep sleep) during MP bootup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * 9AP. We do not use mixed mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Pentium
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * There is a marginal case where REP MOVS on 100MHz SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * machines with B stepping processors can fail. XXX should provide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * an L1cache=Writethrough or L1cache=off option.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * B stepping CPUs may hang. There are hardware work arounds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * for this. We warn about it in case your board doesn't have the work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * arounds. Basically that's so I can tell anyone with a B stepping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * CPU and SMP problems "tough".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Specific items [From Pentium Processor Specification Update]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * 1AP. Linux doesn't use remote read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * 2AP. Linux doesn't trust APIC errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * 3AP. We work around this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * 4AP. Linux never generated 3 interrupts of the same priority
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * to cause a lost local interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * 5AP. Remote read is never used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * 6AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * 7AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * 8AP. worked around in hardware - we get explicit CS errors if not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * 9AP. only 'noapic' mode affected. Might generate spurious
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * interrupts, we log only the first one and count the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * rest silently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * 10AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * 11AP. Linux reads the APIC between writes to avoid this, as per
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * the documentation. Make sure you preserve this as it affects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * the C stepping chips too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * 12AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * 13AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * 14AP. we always deassert INIT during bootup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * 15AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * 16AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * 17AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * 18AP. not affected - worked around in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * 19AP. not affected - worked around in BIOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * If this sounds worrying believe me these bugs are either ___RARE___,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * or are signal timing bugs worked around in hardware and there's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * about nothing of note with C stepping upwards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static atomic_t stopping_cpu = ATOMIC_INIT(-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static bool smp_no_nmi_ipi = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* We are registered on stopping cpu too, avoid spurious NMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (raw_smp_processor_id() == atomic_read(&stopping_cpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return NMI_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) cpu_emergency_vmxoff();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) stop_this_cpu(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return NMI_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * this function calls the 'stop' function on all other CPUs in the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) DEFINE_IDTENTRY_SYSVEC(sysvec_reboot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) cpu_emergency_vmxoff();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) stop_this_cpu(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int register_stop_handler(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return register_nmi_handler(NMI_LOCAL, smp_stop_nmi_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) NMI_FLAG_FIRST, "smp_stop");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void native_stop_other_cpus(int wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (reboot_force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Use an own vector here because smp_call_function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * does lots of things not suitable in a panic situation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * We start by using the REBOOT_VECTOR irq.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * The irq is treated as a sync point to allow critical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * regions of code on other cpus to release their spin locks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * and re-enable irqs. Jumping straight to an NMI might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * accidentally cause deadlocks with further shutdown/panic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * code. By syncing, we give the cpus up to one second to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * finish their work before we force them off with the NMI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (num_online_cpus() > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* did someone beat us here? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (atomic_cmpxchg(&stopping_cpu, -1, safe_smp_processor_id()) != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* sync above data before sending IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) apic_send_IPI_allbutself(REBOOT_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Don't wait longer than a second for IPI completion. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * wait request is not checked here because that would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * prevent an NMI shutdown attempt in case that not all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * CPUs reach shutdown state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) timeout = USEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) while (num_online_cpus() > 1 && timeout--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* if the REBOOT_VECTOR didn't work, try with the NMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (num_online_cpus() > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * If NMI IPI is enabled, try to register the stop handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * and send the IPI. In any case try to wait for the other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * CPUs to stop.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!smp_no_nmi_ipi && !register_stop_handler()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* Sync above data before sending IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) pr_emerg("Shutting down cpus with NMI\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) apic_send_IPI_allbutself(NMI_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * Don't wait longer than 10 ms if the caller didn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * reqeust it. If wait is true, the machine hangs here if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * one or more CPUs do not reach shutdown state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) timeout = USEC_PER_MSEC * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) while (num_online_cpus() > 1 && (wait || timeout--))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) disable_local_APIC();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) mcheck_cpu_clear(this_cpu_ptr(&cpu_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * Reschedule call back. KVM uses this interrupt to force a cpu out of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * guest mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) trace_reschedule_entry(RESCHEDULE_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) inc_irq_stat(irq_resched_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) scheduler_ipi();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) trace_reschedule_exit(RESCHEDULE_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) DEFINE_IDTENTRY_SYSVEC(sysvec_call_function)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) trace_call_function_entry(CALL_FUNCTION_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) inc_irq_stat(irq_call_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) generic_smp_call_function_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) trace_call_function_exit(CALL_FUNCTION_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) DEFINE_IDTENTRY_SYSVEC(sysvec_call_function_single)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) inc_irq_stat(irq_call_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) generic_smp_call_function_single_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) trace_call_function_single_exit(CALL_FUNCTION_SINGLE_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int __init nonmi_ipi_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) smp_no_nmi_ipi = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) __setup("nonmi_ipi", nonmi_ipi_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct smp_ops smp_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .smp_prepare_boot_cpu = native_smp_prepare_boot_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .smp_prepare_cpus = native_smp_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .smp_cpus_done = native_smp_cpus_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .stop_other_cpus = native_stop_other_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #if defined(CONFIG_KEXEC_CORE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .crash_stop_other_cpus = kdump_nmi_shootdown_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .smp_send_reschedule = native_smp_send_reschedule,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .cpu_up = native_cpu_up,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .cpu_die = native_cpu_die,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .cpu_disable = native_cpu_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .play_dead = native_play_dead,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .send_call_func_ipi = native_send_call_func_ipi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .send_call_func_single_ipi = native_send_call_func_single_ipi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) EXPORT_SYMBOL_GPL(smp_ops);