^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 1995 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Pentium III FXSR, SSE support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Gareth Hughes <gareth@valinux.com>, May 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This file handles the architecture-dependent parts of process handling..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/sched/task.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/sched/task_stack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/elfcore.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/user.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/kallsyms.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/personality.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/prctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/ftrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/kdebug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/ldt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/fpu/internal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/desc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <asm/debugreg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <asm/switch_to.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <asm/vm86.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <asm/resctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <asm/proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "process.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) void __show_regs(struct pt_regs *regs, enum show_regs_mode mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const char *log_lvl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned long d0, d1, d2, d3, d6, d7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned short gs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (user_mode(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) gs = get_user_gs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) savesegment(gs, gs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) show_ip(regs, log_lvl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) printk("%sEAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) log_lvl, regs->ax, regs->bx, regs->cx, regs->dx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) printk("%sESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) log_lvl, regs->si, regs->di, regs->bp, regs->sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) printk("%sDS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) log_lvl, (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, regs->ss, regs->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (mode != SHOW_REGS_ALL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) cr0 = read_cr0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) cr2 = read_cr2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) cr3 = __read_cr3();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) cr4 = __read_cr4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) printk("%sCR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) log_lvl, cr0, cr2, cr3, cr4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) get_debugreg(d0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) get_debugreg(d1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) get_debugreg(d2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) get_debugreg(d3, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) get_debugreg(d6, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) get_debugreg(d7, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Only print out debug registers if they are in their non-default state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) (d6 == DR6_RESERVED) && (d7 == 0x400))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) printk("%sDR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) log_lvl, d0, d1, d2, d3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) printk("%sDR6: %08lx DR7: %08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) log_lvl, d6, d7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void release_thread(struct task_struct *dead_task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) BUG_ON(dead_task->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) release_vm86_irqs(dead_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) set_user_gs(regs, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) regs->fs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) regs->ds = __USER_DS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) regs->es = __USER_DS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) regs->ss = __USER_DS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) regs->cs = __USER_CS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) regs->ip = new_ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) regs->sp = new_sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) regs->flags = X86_EFLAGS_IF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) EXPORT_SYMBOL_GPL(start_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * switch_to(x,y) should switch tasks from x to y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * We fsave/fwait so that an exception goes off at the right time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * (as a call from the fsave or fwait in effect) rather than to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * the wrong process. Lazy FP saving no longer makes any sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * with modern CPU's, and this simplifies a lot of things (SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * and UP become the same).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * NOTE! We used to use the x86 hardware context switching. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * reason for not using it any more becomes apparent when you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * try to recover gracefully from saved state that is no longer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * valid (stale segment register values in particular). With the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * hardware task-switch, there is no way to fix up bad state in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * a reasonable manner.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * The fact that Intel documents the hardware task-switching to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * be slow is a fairly red herring - this code is not noticeably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * faster. However, there _is_ some room for improvement here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * so the performance issues may eventually be a valid point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * More important, however, is the fact that this allows us much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * more flexibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * The return value (in %ax) will be the "prev" task after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * the task-switch, and shows up in ret_from_fork in entry.S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * for example.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) __visible __notrace_funcgraph struct task_struct *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct thread_struct *prev = &prev_p->thread,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) *next = &next_p->thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int cpu = smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (!test_thread_flag(TIF_NEED_FPU_LOAD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) switch_fpu_prepare(prev_p, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * Save away %gs. No need to save %fs, as it was saved on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * stack on entry. No need to save %es and %ds, as those are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * always kernel segments while inside the kernel. Doing this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * before setting the new TLS descriptors avoids the situation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * where we temporarily have non-reloadable segments in %fs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * and %gs. This could be an issue if the NMI handler ever
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * used %fs or %gs (it does not today), or if the kernel is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * running inside of a hypervisor layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) lazy_save_gs(prev->gs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * Load the per-thread Thread-Local Storage descriptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) load_TLS(next, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) switch_to_extra(prev_p, next_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * Leave lazy mode, flushing any hypercalls made here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * This must be done before restoring TLS segments so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * the GDT and LDT are properly updated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) arch_end_context_switch(next_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * Reload esp0 and cpu_current_top_of_stack. This changes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * current_thread_info(). Refresh the SYSENTER configuration in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * case prev or next is vm86.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) update_task_stack(next_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) refresh_sysenter_cs(next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) this_cpu_write(cpu_current_top_of_stack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) (unsigned long)task_stack_page(next_p) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) THREAD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * Restore %gs if needed (which is common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (prev->gs | next->gs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) lazy_load_gs(next->gs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) this_cpu_write(current_task, next_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) switch_fpu_finish(next_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Load the Intel cache allocation PQR MSR. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) resctrl_sched_in();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return prev_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return do_arch_prctl_common(current, option, arg2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }