Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/swiotlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/dma-direct.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/mem_encrypt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/swiotlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/xen/swiotlb-xen.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/iommu_table.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int swiotlb __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * pci_swiotlb_detect_override - set swiotlb to 1 if necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * This returns non-zero if we are forced to use swiotlb (by the boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * option).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int __init pci_swiotlb_detect_override(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	if (swiotlb_force == SWIOTLB_FORCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		swiotlb = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	return swiotlb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		  pci_xen_swiotlb_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		  pci_swiotlb_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		  pci_swiotlb_late_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)  * If 4GB or more detected (and iommu=off not set) or if SME is active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)  * then set swiotlb to 1 and return 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int __init pci_swiotlb_detect_4gb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		swiotlb = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	 * If SME is active then swiotlb will be set to 1 so that bounce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	 * buffers are allocated and used for devices that do not support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	 * the addressing range required for the encryption mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	if (sme_active())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		swiotlb = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	return swiotlb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) IOMMU_INIT(pci_swiotlb_detect_4gb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	   pci_swiotlb_detect_override,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	   pci_swiotlb_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	   pci_swiotlb_late_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void __init pci_swiotlb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	if (swiotlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		swiotlb_init(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void __init pci_swiotlb_late_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	/* An IOMMU turned us off. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	if (!swiotlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		swiotlb_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 		printk(KERN_INFO "PCI-DMA: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		       "Using software bounce buffering for IO (SWIOTLB)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		swiotlb_print_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }