^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/dma-direct.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/dmar.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/gart.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/x86_init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/iommu_table.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static bool disable_dac_quirk __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const struct dma_map_ops *dma_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) EXPORT_SYMBOL(dma_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifdef CONFIG_IOMMU_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int panic_on_overflow __read_mostly = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int force_iommu __read_mostly = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int panic_on_overflow __read_mostly = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int force_iommu __read_mostly = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int iommu_merge __read_mostly = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int no_iommu __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Set this to 1 if there is a HW IOMMU in the system */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int iommu_detected __read_mostly = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void __init pci_iommu_alloc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct iommu_table_entry *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) sort_iommu_table(__iommu_table, __iommu_table_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) check_iommu_entries(__iommu_table, __iommu_table_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) for (p = __iommu_table; p < __iommu_table_end; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (p && p->detect && p->detect() > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) p->flags |= IOMMU_DETECTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (p->early_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) p->early_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (p->flags & IOMMU_FINISH_IF_DETECTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * See <Documentation/x86/x86_64/boot-options.rst> for the iommu kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * parameter documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static __init int iommu_setup(char *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) iommu_merge = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (!p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) while (*p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!strncmp(p, "off", 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) no_iommu = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* gart_parse_options has more force support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (!strncmp(p, "force", 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) force_iommu = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!strncmp(p, "noforce", 7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) iommu_merge = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) force_iommu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (!strncmp(p, "biomerge", 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) iommu_merge = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) force_iommu = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (!strncmp(p, "panic", 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) panic_on_overflow = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (!strncmp(p, "nopanic", 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) panic_on_overflow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (!strncmp(p, "merge", 5)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) iommu_merge = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) force_iommu = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!strncmp(p, "nomerge", 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) iommu_merge = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!strncmp(p, "forcesac", 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pr_warn("forcesac option ignored.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!strncmp(p, "allowdac", 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_warn("allowdac option ignored.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (!strncmp(p, "nodac", 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pr_warn("nodac option ignored.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (!strncmp(p, "usedac", 6)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) disable_dac_quirk = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef CONFIG_SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (!strncmp(p, "soft", 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) swiotlb = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (!strncmp(p, "pt", 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) iommu_set_default_passthrough(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (!strncmp(p, "nopt", 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) iommu_set_default_translated(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) gart_parse_options(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) p += strcspn(p, ",");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (*p == ',')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ++p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) early_param("iommu", iommu_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int __init pci_iommu_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct iommu_table_entry *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) x86_init.iommu.iommu_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) for (p = __iommu_table; p < __iommu_table_end; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) p->late_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* Must execute after PCI subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) rootfs_initcall(pci_iommu_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int via_no_dac_cb(struct pci_dev *pdev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) pdev->dev.bus_dma_limit = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void via_no_dac(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (!disable_dac_quirk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pci_walk_bus(dev->subordinate, via_no_dac_cb, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif