Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* ----------------------------------------------------------------------- *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *   Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *   Copyright 2009 Intel Corporation; author: H. Peter Anvin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * x86 MSR access device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * This device is accessed by lseek() to the appropriate register number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * and then read/write in chunks of 8 bytes.  A larger size means multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * reads or writes of the same register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * an SMP box will direct the access to CPU %d.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/major.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/security.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/cpufeature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <asm/msr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static struct class *msr_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static enum cpuhp_state cpuhp_msr_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) enum allow_write_msrs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	MSR_WRITES_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	MSR_WRITES_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	MSR_WRITES_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static enum allow_write_msrs allow_writes = MSR_WRITES_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static ssize_t msr_read(struct file *file, char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u32 __user *tmp = (u32 __user *) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u32 data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 reg = *ppos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int cpu = iminor(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	ssize_t bytes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (count % 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		return -EINVAL;	/* Invalid chunk size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	for (; count; count -= 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		if (copy_to_user(tmp, &data, 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		tmp += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		bytes += 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return bytes ? bytes : err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int filter_write(u32 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	 * MSRs writes usually happen all at once, and can easily saturate kmsg.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	 * Only allow one message every 30 seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	 * It's possible to be smarter here and do it (for example) per-MSR, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	 * it would certainly be more complex, and this is enough at least to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	 * avoid saturating the ring buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	static DEFINE_RATELIMIT_STATE(fw_rs, 30 * HZ, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	switch (allow_writes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	case MSR_WRITES_ON:  return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	case MSR_WRITES_OFF: return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	default: break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!__ratelimit(&fw_rs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (reg == MSR_IA32_ENERGY_PERF_BIAS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	pr_err("Write to unrecognized MSR 0x%x by %s (pid: %d). Please report to x86@kernel.org.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	       reg, current->comm, current->pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static ssize_t msr_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			 size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	const u32 __user *tmp = (const u32 __user *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	u32 data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	u32 reg = *ppos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int cpu = iminor(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ssize_t bytes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	err = security_locked_down(LOCKDOWN_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	err = filter_write(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (count % 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return -EINVAL;	/* Invalid chunk size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	for (; count; count -= 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		if (copy_from_user(&data, tmp, 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		tmp += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		bytes += 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	return bytes ? bytes : err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u32 __user *uregs = (u32 __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	u32 regs[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	int cpu = iminor(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	switch (ioc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	case X86_IOC_RDMSR_REGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		if (!(file->f_mode & FMODE_READ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			err = -EBADF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (copy_from_user(&regs, uregs, sizeof(regs))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		err = rdmsr_safe_regs_on_cpu(cpu, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		if (copy_to_user(uregs, &regs, sizeof(regs)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	case X86_IOC_WRMSR_REGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		if (!(file->f_mode & FMODE_WRITE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			err = -EBADF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		if (copy_from_user(&regs, uregs, sizeof(regs))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		err = security_locked_down(LOCKDOWN_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		err = filter_write(regs[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		err = wrmsr_safe_regs_on_cpu(cpu, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		if (copy_to_user(uregs, &regs, sizeof(regs)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		err = -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int msr_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	unsigned int cpu = iminor(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct cpuinfo_x86 *c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (!capable(CAP_SYS_RAWIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (cpu >= nr_cpu_ids || !cpu_online(cpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		return -ENXIO;	/* No such CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	c = &cpu_data(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (!cpu_has(c, X86_FEATURE_MSR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return -EIO;	/* MSR not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  * File operations we support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const struct file_operations msr_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	.llseek = no_seek_end_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	.read = msr_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.write = msr_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	.open = msr_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.unlocked_ioctl = msr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.compat_ioctl = msr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int msr_device_create(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			    "msr%d", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	return PTR_ERR_OR_ZERO(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int msr_device_destroy(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static char *msr_devnode(struct device *dev, umode_t *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int __init msr_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		pr_err("unable to get major %d for msr\n", MSR_MAJOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	msr_class = class_create(THIS_MODULE, "msr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (IS_ERR(msr_class)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		err = PTR_ERR(msr_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		goto out_chrdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	msr_class->devnode = msr_devnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	err  = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/msr:online",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 				 msr_device_create, msr_device_destroy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		goto out_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	cpuhp_msr_state = err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) out_class:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	class_destroy(msr_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) out_chrdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) module_init(msr_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void __exit msr_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	cpuhp_remove_state(cpuhp_msr_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	class_destroy(msr_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) module_exit(msr_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int set_allow_writes(const char *val, const struct kernel_param *cp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	/* val is NUL-terminated, see kernfs_fop_write() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	char *s = strstrip((char *)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (!strcmp(s, "on"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		allow_writes = MSR_WRITES_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	else if (!strcmp(s, "off"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		allow_writes = MSR_WRITES_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		allow_writes = MSR_WRITES_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static int get_allow_writes(char *buf, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	const char *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	switch (allow_writes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	case MSR_WRITES_ON:  res = "on"; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	case MSR_WRITES_OFF: res = "off"; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	default: res = "default"; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	return sprintf(buf, "%s\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static const struct kernel_param_ops allow_writes_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	.set = set_allow_writes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.get = get_allow_writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) module_param_cb(allow_writes, &allow_writes_ops, NULL, 0600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MODULE_DESCRIPTION("x86 generic MSR driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MODULE_LICENSE("GPL");