Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Common interrupt code for 32 and 64 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/ftrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/irq_stack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/io_apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/mce.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/desc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/trace/irq_vectors.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) EXPORT_PER_CPU_SYMBOL(irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) atomic_t irq_err_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * 'what should we do if we get a hw irq event on an illegal vector'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * each architecture has to answer this themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) void ack_bad_irq(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (printk_ratelimit())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		pr_err("unexpected IRQ trap at vector %02x\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	 * Currently unexpected vectors happen only on SMP and APIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	 * We _must_ ack these because every local APIC has only N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	 * irq slots per priority level, and a 'hanging, unacked' IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	 * holds up an irq slot - in excessive cases (when multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	 * unexpected vectors occur) that might lock up the APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	 * completely.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	 * But only ack when the APIC is enabled -AK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define irq_stats(x)		(&per_cpu(irq_stat, x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * /proc/interrupts printing for arch specific interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) int arch_show_interrupts(struct seq_file *p, int prec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	seq_printf(p, "%*s: ", prec, "NMI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	seq_puts(p, "  Non-maskable interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #ifdef CONFIG_X86_LOCAL_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	seq_printf(p, "%*s: ", prec, "LOC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	seq_puts(p, "  Local timer interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	seq_printf(p, "%*s: ", prec, "SPU");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	seq_puts(p, "  Spurious interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	seq_printf(p, "%*s: ", prec, "PMI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	seq_puts(p, "  Performance monitoring interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	seq_printf(p, "%*s: ", prec, "IWI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	seq_puts(p, "  IRQ work interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	seq_printf(p, "%*s: ", prec, "RTR");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	seq_puts(p, "  APIC ICR read retries\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (x86_platform_ipi_callback) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		seq_printf(p, "%*s: ", prec, "PLT");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		seq_puts(p, "  Platform interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	seq_printf(p, "%*s: ", prec, "RES");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	seq_puts(p, "  Rescheduling interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	seq_printf(p, "%*s: ", prec, "CAL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	seq_puts(p, "  Function call interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	seq_printf(p, "%*s: ", prec, "TLB");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	seq_puts(p, "  TLB shootdowns\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #ifdef CONFIG_X86_THERMAL_VECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	seq_printf(p, "%*s: ", prec, "TRM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	seq_puts(p, "  Thermal event interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #ifdef CONFIG_X86_MCE_THRESHOLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	seq_printf(p, "%*s: ", prec, "THR");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	seq_puts(p, "  Threshold APIC interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #ifdef CONFIG_X86_MCE_AMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	seq_printf(p, "%*s: ", prec, "DFR");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		seq_printf(p, "%10u ", irq_stats(j)->irq_deferred_error_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	seq_puts(p, "  Deferred Error APIC interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #ifdef CONFIG_X86_MCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	seq_printf(p, "%*s: ", prec, "MCE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	seq_puts(p, "  Machine check exceptions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	seq_printf(p, "%*s: ", prec, "MCP");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	seq_puts(p, "  Machine check polls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_X86_HV_CALLBACK_VECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (test_bit(HYPERVISOR_CALLBACK_VECTOR, system_vectors)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		seq_printf(p, "%*s: ", prec, "HYP");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			seq_printf(p, "%10u ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 				   irq_stats(j)->irq_hv_callback_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		seq_puts(p, "  Hypervisor callback interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #if IS_ENABLED(CONFIG_HYPERV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (test_bit(HYPERV_REENLIGHTENMENT_VECTOR, system_vectors)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		seq_printf(p, "%*s: ", prec, "HRE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			seq_printf(p, "%10u ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 				   irq_stats(j)->irq_hv_reenlightenment_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		seq_puts(p, "  Hyper-V reenlightenment interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (test_bit(HYPERV_STIMER0_VECTOR, system_vectors)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		seq_printf(p, "%*s: ", prec, "HVS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			seq_printf(p, "%10u ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 				   irq_stats(j)->hyperv_stimer0_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		seq_puts(p, "  Hyper-V stimer0 interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #if defined(CONFIG_X86_IO_APIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #ifdef CONFIG_HAVE_KVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	seq_printf(p, "%*s: ", prec, "PIN");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		seq_printf(p, "%10u ", irq_stats(j)->kvm_posted_intr_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	seq_puts(p, "  Posted-interrupt notification event\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	seq_printf(p, "%*s: ", prec, "NPI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		seq_printf(p, "%10u ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			   irq_stats(j)->kvm_posted_intr_nested_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	seq_puts(p, "  Nested posted-interrupt event\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	seq_printf(p, "%*s: ", prec, "PIW");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	for_each_online_cpu(j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		seq_printf(p, "%10u ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			   irq_stats(j)->kvm_posted_intr_wakeup_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	seq_puts(p, "  Posted-interrupt wakeup event\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  * /proc/stat helpers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u64 arch_irq_stat_cpu(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	u64 sum = irq_stats(cpu)->__nmi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #ifdef CONFIG_X86_LOCAL_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	sum += irq_stats(cpu)->apic_timer_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	sum += irq_stats(cpu)->irq_spurious_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	sum += irq_stats(cpu)->apic_perf_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	sum += irq_stats(cpu)->apic_irq_work_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	sum += irq_stats(cpu)->icr_read_retry_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (x86_platform_ipi_callback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		sum += irq_stats(cpu)->x86_platform_ipis;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	sum += irq_stats(cpu)->irq_resched_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	sum += irq_stats(cpu)->irq_call_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #ifdef CONFIG_X86_THERMAL_VECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	sum += irq_stats(cpu)->irq_thermal_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifdef CONFIG_X86_MCE_THRESHOLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	sum += irq_stats(cpu)->irq_threshold_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #ifdef CONFIG_X86_MCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	sum += per_cpu(mce_exception_count, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	sum += per_cpu(mce_poll_count, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	return sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u64 arch_irq_stat(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	u64 sum = atomic_read(&irq_err_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	return sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static __always_inline void handle_irq(struct irq_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				       struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (IS_ENABLED(CONFIG_X86_64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		run_irq_on_irqstack_cond(desc->handle_irq, desc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		__handle_irq(desc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  * common_interrupt() handles all normal device IRQ's (the special SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)  * cross-CPU interrupts have their own entry points).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) DEFINE_IDTENTRY_IRQ(common_interrupt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct pt_regs *old_regs = set_irq_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct irq_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/* entry code tells RCU that we're not quiescent.  Check it. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "IRQ failed to wake up RCU");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	desc = __this_cpu_read(vector_irq[vector]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (likely(!IS_ERR_OR_NULL(desc))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		handle_irq(desc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		if (desc == VECTOR_UNUSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			pr_emerg_ratelimited("%s: %d.%u No irq handler for vector\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 					     __func__, smp_processor_id(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 					     vector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			__this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	set_irq_regs(old_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #ifdef CONFIG_X86_LOCAL_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* Function pointer for generic interrupt vector handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) void (*x86_platform_ipi_callback)(void) = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)  * Handler for X86_PLATFORM_IPI_VECTOR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DEFINE_IDTENTRY_SYSVEC(sysvec_x86_platform_ipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct pt_regs *old_regs = set_irq_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	inc_irq_stat(x86_platform_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (x86_platform_ipi_callback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		x86_platform_ipi_callback();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	set_irq_regs(old_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #ifdef CONFIG_HAVE_KVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static void dummy_handler(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static void (*kvm_posted_intr_wakeup_handler)(void) = dummy_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) void kvm_set_posted_intr_wakeup_handler(void (*handler)(void))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		kvm_posted_intr_wakeup_handler = handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		kvm_posted_intr_wakeup_handler = dummy_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		synchronize_rcu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wakeup_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)  * Handler for POSTED_INTERRUPT_VECTOR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_ipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	inc_irq_stat(kvm_posted_intr_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)  * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_posted_intr_wakeup_ipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	inc_irq_stat(kvm_posted_intr_wakeup_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	kvm_posted_intr_wakeup_handler();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)  * Handler for POSTED_INTERRUPT_NESTED_VECTOR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_nested_ipi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	ack_APIC_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	inc_irq_stat(kvm_posted_intr_nested_ipis);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) void fixup_irqs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	unsigned int irr, vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	struct irq_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	struct irq_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	struct irq_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	irq_migrate_all_off_this_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	 * We can remove mdelay() and then send spuriuous interrupts to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	 * new cpu targets for all the irqs that were handled previously by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	 * this cpu. While it works, I have seen spurious interrupt messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	 * (nothing wrong but still...).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	 * So for now, retain mdelay(1) and check the IRR and then send those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	 * interrupts to new targets as this cpu is already offlined...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	mdelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	 * We can walk the vector array of this cpu without holding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	 * vector_lock because the cpu is already marked !online, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	 * nothing else will touch it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		if (IS_ERR_OR_NULL(__this_cpu_read(vector_irq[vector])))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		if (irr  & (1 << (vector % 32))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 			desc = __this_cpu_read(vector_irq[vector]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			data = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 			chip = irq_data_get_irq_chip(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			if (chip->irq_retrigger) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 				chip->irq_retrigger(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 				__this_cpu_write(vector_irq[vector], VECTOR_RETRIGGERED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		if (__this_cpu_read(vector_irq[vector]) != VECTOR_RETRIGGERED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 			__this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #endif