Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * 8253/PIT functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/i8253.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/hpet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * HPET replaces the PIT, when enabled. So we need to know, which of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * the two timers is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct clock_event_device *global_clock_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * Modern chipsets can disable the PIT clock which makes it unusable. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * would be possible to enable the clock but the registers are chipset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * specific and not discoverable. Avoid the whack a mole game.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * These platforms have discoverable TSC/CPU frequencies but this also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * requires to know the local APIC timer frequency as it normally is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * calibrated against the PIT interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static bool __init use_pit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	if (!IS_ENABLED(CONFIG_X86_TSC) || !boot_cpu_has(X86_FEATURE_TSC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	/* This also returns true when APIC is disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return apic_needs_pit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) bool __init pit_timer_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	if (!use_pit())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	clockevent_i8253_init(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	global_clock_event = &i8253_clockevent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifndef CONFIG_X86_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int __init init_pit_clocksource(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	 /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	  * Several reasons not to register PIT as a clocksource:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	  * - On SMP PIT does not scale due to i8253_lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	  * - when HPET is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	  * - when local APIC timer is active (PIT is switched off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	if (num_possible_cpus() > 1 || is_hpet_enabled() ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	    !clockevent_state_periodic(&i8253_clockevent))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	return clocksource_i8253_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) arch_initcall(init_pit_clocksource);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif /* !CONFIG_X86_64 */