Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * 8237A DMA controller suspend functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Written by Pierre Ossman, 2005.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/x86_init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * This module just handles suspend/resume issues with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * 8237A DMA controller (used for ISA and LPC).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * Allocation is handled in kernel/dma.c and normal usage is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * in asm/dma.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static void i8237A_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	flags = claim_dma_lock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	dma_outb(0, DMA1_RESET_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	dma_outb(0, DMA2_RESET_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		set_dma_addr(i, 0x000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		/* DMA count is a bit weird so this is not 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		set_dma_count(i, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	/* Enable cascade DMA or channel 0-3 won't work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	enable_dma(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	release_dma_lock(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct syscore_ops i8237_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.resume		= i8237A_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int __init i8237A_init_ops(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 * From SKL PCH onwards, the legacy DMA device is removed in which the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	 * I/O ports (81h-83h, 87h, 89h-8Bh, 8Fh) related to it are removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	 * as well. All removed ports must return 0xff for a inb() request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	 * Note: DMA_PAGE_2 (port 0x81) should not be checked for detecting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	 * the presence of DMA device since it may be used by BIOS to decode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	 * LPC traffic for POST codes. Original LPC only decodes one byte of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	 * port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	 * decoding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	if (dma_inb(DMA_PAGE_0) == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	 * It is not required to load this driver as newer SoC may not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	 * support 8237 DMA or bus mastering from LPC. Platform firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	 * must announce the support for such legacy devices via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	 * ACPI_FADT_LEGACY_DEVICES field in FADT table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	if (x86_pnpbios_disabled() && dmi_get_bios_year() >= 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	register_syscore_ops(&i8237_syscore_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) device_initcall(i8237A_init_ops);