Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  *	Routines to identify additional cpu features that are scattered in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *	cpuid space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <asm/memtype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct cpuid_bit {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	u16 feature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	u8 bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	u32 level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	u32 sub_leaf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * Please keep the leaf sorted by cpuid_bit.level for faster search.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * X86_FEATURE_MBA is supported by both Intel and AMD. But the CPUID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * levels are different and there is a separate entry for each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static const struct cpuid_bit cpuid_bits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	{ X86_FEATURE_CQM_LLC,		CPUID_EDX,  1, 0x0000000f, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	{ X86_FEATURE_CQM_OCCUP_LLC,	CPUID_EDX,  0, 0x0000000f, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	{ X86_FEATURE_CQM_MBM_TOTAL,	CPUID_EDX,  1, 0x0000000f, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	{ X86_FEATURE_CQM_MBM_LOCAL,	CPUID_EDX,  2, 0x0000000f, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	{ X86_FEATURE_CDP_L2,		CPUID_ECX,  2, 0x00000010, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	{ X86_FEATURE_MBA,		CPUID_EBX,  3, 0x00000010, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	{ X86_FEATURE_PER_THREAD_MBA,	CPUID_ECX,  0, 0x00000010, 3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	{ X86_FEATURE_SME,		CPUID_EAX,  0, 0x8000001f, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	{ X86_FEATURE_SEV,		CPUID_EAX,  1, 0x8000001f, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	{ X86_FEATURE_SEV_ES,		CPUID_EAX,  3, 0x8000001f, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	{ X86_FEATURE_SME_COHERENT,	CPUID_EAX, 10, 0x8000001f, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	{ 0, 0, 0, 0, 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	u32 max_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	u32 regs[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	const struct cpuid_bit *cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	for (cb = cpuid_bits; cb->feature; cb++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		/* Verify that the level is valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		max_level = cpuid_eax(cb->level & 0xffff0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		if (max_level < cb->level ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		    max_level > (cb->level | 0xffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 			    &regs[CPUID_EBX], &regs[CPUID_ECX],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 			    &regs[CPUID_EDX]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		if (regs[cb->reg] & (1 << cb->bit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 			set_cpu_cap(c, cb->feature);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }