^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Generate definitions needed by assembly language modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This code generates raw asm output which is post-processed to extract
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * and format the required data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define COMPILE_OFFSETS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/crypto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/hardirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kbuild.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/sigframe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/bootparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifdef CONFIG_XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <xen/interface/xen.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifdef CONFIG_X86_32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) # include "asm-offsets_32.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) # include "asm-offsets_64.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static void __used common(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) OFFSET(TASK_threadsp, task_struct, thread.sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #ifdef CONFIG_STACKPROTECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) OFFSET(TASK_stack_canary, task_struct, stack_canary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) OFFSET(pbe_address, pbe, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) OFFSET(pbe_orig_address, pbe, orig_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) OFFSET(pbe_next, pbe, next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #ifdef CONFIG_PARAVIRT_XXL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) OFFSET(PV_IRQ_irq_disable, paravirt_patch_template, irq.irq_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) OFFSET(PV_IRQ_irq_enable, paravirt_patch_template, irq.irq_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) OFFSET(PV_CPU_iret, paravirt_patch_template, cpu.iret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) OFFSET(PV_MMU_read_cr2, paravirt_patch_template, mmu.read_cr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #ifdef CONFIG_XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) OFFSET(XEN_vcpu_info_arch_cr2, vcpu_info, arch.cr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) OFFSET(BP_scratch, boot_params, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) OFFSET(BP_secure_boot, boot_params, secure_boot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) OFFSET(BP_loadflags, boot_params, hdr.loadflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) OFFSET(BP_version, boot_params, hdr.version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) OFFSET(BP_init_size, boot_params, hdr.init_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) OFFSET(BP_pref_address, boot_params, hdr.pref_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) BLANK();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* TLB state for the entry code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Layout info for cpu_entry_area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) DEFINE(MASK_entry_stack, (~(sizeof(struct entry_stack) - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* Offset for fields in tss_struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) OFFSET(TSS_sp1, tss_struct, x86_tss.sp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) OFFSET(TSS_sp2, tss_struct, x86_tss.sp2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }