Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_X86_TLB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_X86_TLB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #define tlb_start_vma(tlb, vma) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define tlb_end_vma(tlb, vma) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define tlb_flush tlb_flush
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) static inline void tlb_flush(struct mmu_gather *tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm-generic/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static inline void tlb_flush(struct mmu_gather *tlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	unsigned long start = 0UL, end = TLB_FLUSH_ALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	unsigned int stride_shift = tlb_get_unmap_shift(tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	if (!tlb->fullmm && !tlb->need_flush_all) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		start = tlb->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		end = tlb->end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	flush_tlb_mm_range(tlb->mm, start, end, stride_shift, tlb->freed_tables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * While x86 architecture in general requires an IPI to perform TLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * shootdown, enablement code for several hypervisors overrides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * .flush_tlb_others hook in pv_mmu_ops and implements it by issuing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * a hypercall. To keep software pagetable walkers safe in this case we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * switch to RCU based table free (MMU_GATHER_RCU_TABLE_FREE). See the comment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * below 'ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE' in include/asm-generic/tlb.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static inline void __tlb_remove_table(void *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	free_page_and_swap_cache(table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif /* _ASM_X86_TLB_H */