Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_X86_SPINLOCK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_X86_SPINLOCK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/jump_label.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/paravirt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * Your basic SMP spinlocks, allowing only a single CPU anywhere
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * Simple spin lock operations.  There are two variants, one clears IRQ's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * on the local processor, one does not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * (the type definitions are in asm/spinlock_types.h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* How long a lock should spin before we consider blocking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SPIN_THRESHOLD	(1 << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/qspinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * Read-write spinlocks, allowing multiple readers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * but only one writer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * NOTE! it is quite common to have readers in interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * but no interrupt writers. For those circumstances we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  * can "mix" irq-safe locks - any writer needs to get a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * irq-safe write-lock, but readers can get non-irqsafe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  * read-locks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)  * On x86, we implement read-write locks using the generic qrwlock with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)  * x86 specific optimization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/qrwlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif /* _ASM_X86_SPINLOCK_H */