^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_X86_RMWcc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_X86_RMWcc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* This counts to 12. Any more, it will return 13th argument. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define __RMWcc_ARGS(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _n, X...) _n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define RMWcc_ARGS(X...) __RMWcc_ARGS(, ##X, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __RMWcc_CONCAT(a, b) a ## b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define RMWcc_CONCAT(a, b) __RMWcc_CONCAT(a, b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __CLOBBERS_MEM(clb...) "memory", ## clb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #if !defined(__GCC_ASM_FLAG_OUTPUTS__) && defined(CONFIG_CC_HAS_ASM_GOTO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Use asm goto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) bool c = false; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) asm_volatile_goto (fullop "; j" #cc " %l[cc_label]" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) : : [var] "m" (_var), ## __VA_ARGS__ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) : clobbers : cc_label); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) if (0) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) cc_label: c = true; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) c; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #else /* defined(__GCC_ASM_FLAG_OUTPUTS__) || !defined(CONFIG_CC_HAS_ASM_GOTO) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Use flags output or a set instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) bool c; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) asm volatile (fullop CC_SET(cc) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) : [var] "+m" (_var), CC_OUT(cc) (c) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) : __VA_ARGS__ : clobbers); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) c; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif /* defined(__GCC_ASM_FLAG_OUTPUTS__) || !defined(CONFIG_CC_HAS_ASM_GOTO) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define GEN_UNARY_RMWcc_4(op, var, cc, arg0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define GEN_UNARY_RMWcc_3(op, var, cc) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GEN_UNARY_RMWcc_4(op, var, cc, "%[var]")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GEN_UNARY_RMWcc(X...) RMWcc_CONCAT(GEN_UNARY_RMWcc_, RMWcc_ARGS(X))(X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) __GEN_RMWcc(op " %[val], " arg0, var, cc, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) __CLOBBERS_MEM(), [val] vcon (_val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define GEN_BINARY_RMWcc_5(op, var, cc, vcon, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) GEN_BINARY_RMWcc_6(op, var, cc, vcon, val, "%[var]")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define GEN_BINARY_RMWcc(X...) RMWcc_CONCAT(GEN_BINARY_RMWcc_, RMWcc_ARGS(X))(X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define GEN_UNARY_SUFFIXED_RMWcc(op, suffix, var, cc, clobbers...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) __GEN_RMWcc(op " %[var]\n\t" suffix, var, cc, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __CLOBBERS_MEM(clobbers))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, cc, vcon, _val, clobbers...)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __GEN_RMWcc(op " %[val], %[var]\n\t" suffix, var, cc, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) __CLOBBERS_MEM(clobbers), [val] vcon (_val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif /* _ASM_X86_RMWcc */