^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_X86_PERCPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_X86_PERCPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifdef CONFIG_X86_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define __percpu_seg gs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __percpu_seg fs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifdef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PER_CPU_VAR(var) %__percpu_seg:var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #else /* ! SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PER_CPU_VAR(var) var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif /* SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #ifdef CONFIG_X86_64_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define INIT_PER_CPU_VAR(var) init_per_cpu__##var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define INIT_PER_CPU_VAR(var) var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #else /* ...!ASSEMBLY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/stringify.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define __percpu_prefix "%%"__stringify(__percpu_seg)":"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define __my_cpu_offset this_cpu_read(this_cpu_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Compared to the generic __my_cpu_offset version, the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * saves one instruction and avoids clobbering a temp register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define arch_raw_cpu_ptr(ptr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long tcp_ptr__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) asm volatile("add " __percpu_arg(1) ", %0" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) : "=r" (tcp_ptr__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) : "m" (this_cpu_off), "0" (ptr)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) (typeof(*(ptr)) __kernel __force *)tcp_ptr__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define __percpu_prefix ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define __percpu_arg(x) __percpu_prefix "%" #x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Initialized pointers to per-cpu variables needed for the boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * processor need to use these macros to get the proper address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * offset from __per_cpu_load on SMP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * There also must be an entry in vmlinux_64.lds.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define DECLARE_INIT_PER_CPU(var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) extern typeof(var) init_per_cpu_var(var)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #ifdef CONFIG_X86_64_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define init_per_cpu_var(var) init_per_cpu__##var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define init_per_cpu_var(var) var
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* For arch-specific code, we can use direct single-insn ops (they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * don't give an lvalue though). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define __pcpu_type_1 u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define __pcpu_type_2 u16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define __pcpu_type_4 u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define __pcpu_type_8 u64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define __pcpu_cast_1(val) ((u8)(((unsigned long) val) & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define __pcpu_cast_2(val) ((u16)(((unsigned long) val) & 0xffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define __pcpu_cast_4(val) ((u32)(((unsigned long) val) & 0xffffffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define __pcpu_cast_8(val) ((u64)(val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define __pcpu_op1_1(op, dst) op "b " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define __pcpu_op1_2(op, dst) op "w " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define __pcpu_op1_4(op, dst) op "l " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define __pcpu_op1_8(op, dst) op "q " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define __pcpu_op2_1(op, src, dst) op "b " src ", " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define __pcpu_op2_2(op, src, dst) op "w " src ", " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define __pcpu_op2_4(op, src, dst) op "l " src ", " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define __pcpu_op2_8(op, src, dst) op "q " src ", " dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define __pcpu_reg_1(mod, x) mod "q" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define __pcpu_reg_2(mod, x) mod "r" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define __pcpu_reg_4(mod, x) mod "r" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define __pcpu_reg_8(mod, x) mod "r" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define __pcpu_reg_imm_1(x) "qi" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define __pcpu_reg_imm_2(x) "ri" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define __pcpu_reg_imm_4(x) "ri" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define __pcpu_reg_imm_8(x) "re" (x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define percpu_to_op(size, qual, op, _var, _val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (0) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) typeof(_var) pto_tmp__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pto_tmp__ = (_val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) (void)pto_tmp__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) asm qual(__pcpu_op2_##size(op, "%[val]", __percpu_arg([var])) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) : [var] "+m" (_var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) : [val] __pcpu_reg_imm_##size(pto_val__)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define percpu_unary_op(size, qual, op, _var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) asm qual (__pcpu_op1_##size(op, __percpu_arg([var])) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) : [var] "+m" (_var)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * Generate a percpu add to memory instruction and optimize code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * if one is added or subtracted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define percpu_add_op(size, qual, var, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) const int pao_ID__ = (__builtin_constant_p(val) && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ((val) == 1 || (val) == -1)) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) (int)(val) : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (0) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) typeof(var) pao_tmp__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pao_tmp__ = (val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) (void)pao_tmp__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (pao_ID__ == 1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) percpu_unary_op(size, qual, "inc", var); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) else if (pao_ID__ == -1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) percpu_unary_op(size, qual, "dec", var); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) percpu_to_op(size, qual, "add", var, val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define percpu_from_op(size, qual, op, _var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) __pcpu_type_##size pfo_val__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) asm qual (__pcpu_op2_##size(op, __percpu_arg([var]), "%[val]") \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) : [val] __pcpu_reg_##size("=", pfo_val__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) : [var] "m" (_var)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) (typeof(_var))(unsigned long) pfo_val__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define percpu_stable_op(size, op, _var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __pcpu_type_##size pfo_val__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) asm(__pcpu_op2_##size(op, __percpu_arg(P[var]), "%[val]") \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) : [val] __pcpu_reg_##size("=", pfo_val__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) : [var] "p" (&(_var))); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) (typeof(_var))(unsigned long) pfo_val__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * Add return operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define percpu_add_return_op(size, qual, _var, _val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) __pcpu_type_##size paro_tmp__ = __pcpu_cast_##size(_val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) asm qual (__pcpu_op2_##size("xadd", "%[tmp]", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __percpu_arg([var])) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) : [tmp] __pcpu_reg_##size("+", paro_tmp__), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) [var] "+m" (_var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) : : "memory"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) (typeof(_var))(unsigned long) (paro_tmp__ + _val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * xchg is implemented using cmpxchg without a lock prefix. xchg is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * expensive due to the implied lock prefix. The processor cannot prefetch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * cachelines if xchg is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define percpu_xchg_op(size, qual, _var, _nval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) __pcpu_type_##size pxo_old__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) __pcpu_type_##size pxo_new__ = __pcpu_cast_##size(_nval); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) asm qual (__pcpu_op2_##size("mov", __percpu_arg([var]), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "%[oval]") \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) "\n1:\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) __pcpu_op2_##size("cmpxchg", "%[nval]", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) __percpu_arg([var])) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) "\n\tjnz 1b" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) : [oval] "=&a" (pxo_old__), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) [var] "+m" (_var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) : [nval] __pcpu_reg_##size(, pxo_new__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) : "memory"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) (typeof(_var))(unsigned long) pxo_old__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * cmpxchg has no such implied lock semantics as a result it is much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * more efficient for cpu local operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define percpu_cmpxchg_op(size, qual, _var, _oval, _nval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) __pcpu_type_##size pco_old__ = __pcpu_cast_##size(_oval); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) __pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) asm qual (__pcpu_op2_##size("cmpxchg", "%[nval]", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) __percpu_arg([var])) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) : [oval] "+a" (pco_old__), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) [var] "+m" (_var) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) : [nval] __pcpu_reg_##size(, pco_new__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) : "memory"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) (typeof(_var))(unsigned long) pco_old__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * this_cpu_read() makes gcc load the percpu variable every time it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * accessed while this_cpu_read_stable() allows the value to be cached.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * this_cpu_read_stable() is more efficient and can be used if its value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * is guaranteed to be valid across cpus. The current users include
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * get_current() and get_thread_info() both of which are actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * per-thread variables implemented as per-cpu variables and thus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * stable for the duration of the respective task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define this_cpu_read_stable_1(pcp) percpu_stable_op(1, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define this_cpu_read_stable_2(pcp) percpu_stable_op(2, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define this_cpu_read_stable_4(pcp) percpu_stable_op(4, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define this_cpu_read_stable_8(pcp) percpu_stable_op(8, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define this_cpu_read_stable(pcp) __pcpu_size_call_return(this_cpu_read_stable_, pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define raw_cpu_read_1(pcp) percpu_from_op(1, , "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define raw_cpu_read_2(pcp) percpu_from_op(2, , "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define raw_cpu_read_4(pcp) percpu_from_op(4, , "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define raw_cpu_write_1(pcp, val) percpu_to_op(1, , "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define raw_cpu_write_2(pcp, val) percpu_to_op(2, , "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define raw_cpu_write_4(pcp, val) percpu_to_op(4, , "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define raw_cpu_add_1(pcp, val) percpu_add_op(1, , (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define raw_cpu_add_2(pcp, val) percpu_add_op(2, , (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define raw_cpu_add_4(pcp, val) percpu_add_op(4, , (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define raw_cpu_and_1(pcp, val) percpu_to_op(1, , "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define raw_cpu_and_2(pcp, val) percpu_to_op(2, , "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define raw_cpu_and_4(pcp, val) percpu_to_op(4, , "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define raw_cpu_or_1(pcp, val) percpu_to_op(1, , "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define raw_cpu_or_2(pcp, val) percpu_to_op(2, , "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define raw_cpu_or_4(pcp, val) percpu_to_op(4, , "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * raw_cpu_xchg() can use a load-store since it is not required to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * IRQ-safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define raw_percpu_xchg_op(var, nval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) typeof(var) pxo_ret__ = raw_cpu_read(var); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) raw_cpu_write(var, (nval)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pxo_ret__; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define raw_cpu_xchg_1(pcp, val) raw_percpu_xchg_op(pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define raw_cpu_xchg_2(pcp, val) raw_percpu_xchg_op(pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define raw_cpu_xchg_4(pcp, val) raw_percpu_xchg_op(pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define this_cpu_read_1(pcp) percpu_from_op(1, volatile, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define this_cpu_read_2(pcp) percpu_from_op(2, volatile, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define this_cpu_read_4(pcp) percpu_from_op(4, volatile, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define this_cpu_write_1(pcp, val) percpu_to_op(1, volatile, "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define this_cpu_write_2(pcp, val) percpu_to_op(2, volatile, "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define this_cpu_write_4(pcp, val) percpu_to_op(4, volatile, "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define this_cpu_add_1(pcp, val) percpu_add_op(1, volatile, (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define this_cpu_add_2(pcp, val) percpu_add_op(2, volatile, (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define this_cpu_add_4(pcp, val) percpu_add_op(4, volatile, (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define this_cpu_and_1(pcp, val) percpu_to_op(1, volatile, "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define this_cpu_and_2(pcp, val) percpu_to_op(2, volatile, "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define this_cpu_and_4(pcp, val) percpu_to_op(4, volatile, "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define this_cpu_or_1(pcp, val) percpu_to_op(1, volatile, "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define this_cpu_or_2(pcp, val) percpu_to_op(2, volatile, "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define this_cpu_or_4(pcp, val) percpu_to_op(4, volatile, "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define this_cpu_xchg_1(pcp, nval) percpu_xchg_op(1, volatile, pcp, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(2, volatile, pcp, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(4, volatile, pcp, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define raw_cpu_add_return_1(pcp, val) percpu_add_return_op(1, , pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define raw_cpu_add_return_2(pcp, val) percpu_add_return_op(2, , pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define raw_cpu_add_return_4(pcp, val) percpu_add_return_op(4, , pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define raw_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, , pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define raw_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, , pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define raw_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, , pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define this_cpu_add_return_1(pcp, val) percpu_add_return_op(1, volatile, pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define this_cpu_add_return_2(pcp, val) percpu_add_return_op(2, volatile, pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define this_cpu_add_return_4(pcp, val) percpu_add_return_op(4, volatile, pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define this_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, volatile, pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, volatile, pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, volatile, pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #ifdef CONFIG_X86_CMPXCHG64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) bool __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) typeof(pcp1) __o1 = (o1), __n1 = (n1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) typeof(pcp2) __o2 = (o2), __n2 = (n2); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) asm volatile("cmpxchg8b "__percpu_arg(1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) CC_SET(z) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) : CC_OUT(z) (__ret), "+m" (pcp1), "+m" (pcp2), "+a" (__o1), "+d" (__o2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) : "b" (__n1), "c" (__n2)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define raw_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #endif /* CONFIG_X86_CMPXCHG64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * Per cpu atomic 64 bit operations are only available under 64 bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * 32 bit must fall back to generic operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #ifdef CONFIG_X86_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define raw_cpu_read_8(pcp) percpu_from_op(8, , "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define raw_cpu_write_8(pcp, val) percpu_to_op(8, , "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define raw_cpu_add_8(pcp, val) percpu_add_op(8, , (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define raw_cpu_and_8(pcp, val) percpu_to_op(8, , "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define raw_cpu_or_8(pcp, val) percpu_to_op(8, , "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define raw_cpu_add_return_8(pcp, val) percpu_add_return_op(8, , pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define raw_cpu_xchg_8(pcp, nval) raw_percpu_xchg_op(pcp, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define raw_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, , pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define this_cpu_read_8(pcp) percpu_from_op(8, volatile, "mov", pcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define this_cpu_write_8(pcp, val) percpu_to_op(8, volatile, "mov", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define this_cpu_add_8(pcp, val) percpu_add_op(8, volatile, (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define this_cpu_and_8(pcp, val) percpu_to_op(8, volatile, "and", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define this_cpu_or_8(pcp, val) percpu_to_op(8, volatile, "or", (pcp), val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define this_cpu_add_return_8(pcp, val) percpu_add_return_op(8, volatile, pcp, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define this_cpu_xchg_8(pcp, nval) percpu_xchg_op(8, volatile, pcp, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * Pretty complex macro to generate cmpxchg16 instruction. The instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * is not supported on early AMD64 processors so we must be able to emulate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * it in software. The address used in the cmpxchg16 instruction must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * aligned to a 16 byte boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define percpu_cmpxchg16b_double(pcp1, pcp2, o1, o2, n1, n2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) bool __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) typeof(pcp1) __o1 = (o1), __n1 = (n1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) typeof(pcp2) __o2 = (o2), __n2 = (n2); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) alternative_io("leaq %P1,%%rsi\n\tcall this_cpu_cmpxchg16b_emu\n\t", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) "cmpxchg16b " __percpu_arg(1) "\n\tsetz %0\n\t", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) X86_FEATURE_CX16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ASM_OUTPUT2("=a" (__ret), "+m" (pcp1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) "+m" (pcp2), "+d" (__o2)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) "b" (__n1), "c" (__n2), "a" (__o1) : "rsi"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define raw_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static __always_inline bool x86_this_cpu_constant_test_bit(unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) const unsigned long __percpu *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) unsigned long __percpu *a =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) (unsigned long __percpu *)addr + nr / BITS_PER_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #ifdef CONFIG_X86_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return ((1UL << (nr % BITS_PER_LONG)) & raw_cpu_read_8(*a)) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return ((1UL << (nr % BITS_PER_LONG)) & raw_cpu_read_4(*a)) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static inline bool x86_this_cpu_variable_test_bit(int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) const unsigned long __percpu *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) bool oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) asm volatile("btl "__percpu_arg(2)",%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) CC_SET(c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) : CC_OUT(c) (oldbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) : "m" (*(unsigned long __percpu *)addr), "Ir" (nr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define x86_this_cpu_test_bit(nr, addr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) (__builtin_constant_p((nr)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ? x86_this_cpu_constant_test_bit((nr), (addr)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) : x86_this_cpu_variable_test_bit((nr), (addr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #include <asm-generic/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* We can use this directly for local CPU (faster). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) DECLARE_PER_CPU_READ_MOSTLY(unsigned long, this_cpu_off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * variables that are initialized and accessed before there are per_cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * areas allocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) DEFINE_PER_CPU(_type, _name) = _initvalue; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) { [0 ... NR_CPUS-1] = _initvalue }; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) { [0 ... NR_CPUS-1] = _initvalue }; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) EXPORT_PER_CPU_SYMBOL(_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define DECLARE_EARLY_PER_CPU(_type, _name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) DECLARE_PER_CPU(_type, _name); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) extern __typeof__(_type) *_name##_early_ptr; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) extern __typeof__(_type) _name##_early_map[]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) DECLARE_PER_CPU_READ_MOSTLY(_type, _name); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) extern __typeof__(_type) *_name##_early_ptr; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) extern __typeof__(_type) _name##_early_map[]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define early_per_cpu_ptr(_name) (_name##_early_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define early_per_cpu(_name, _cpu) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) *(early_per_cpu_ptr(_name) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) &early_per_cpu_ptr(_name)[_cpu] : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) &per_cpu(_name, _cpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #else /* !CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) DEFINE_PER_CPU(_type, _name) = _initvalue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) EXPORT_PER_CPU_SYMBOL(_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define DECLARE_EARLY_PER_CPU(_type, _name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) DECLARE_PER_CPU(_type, _name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) DECLARE_PER_CPU_READ_MOSTLY(_type, _name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define early_per_cpu_ptr(_name) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* no early_per_cpu_map() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #endif /* !CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #endif /* _ASM_X86_PERCPU_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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