^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* OLPC machine specific definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #ifndef _ASM_X86_OLPC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define _ASM_X86_OLPC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/geode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) struct olpc_platform_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) uint32_t boardrev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define OLPC_F_PRESENT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define OLPC_F_DCON 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifdef CONFIG_OLPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern struct olpc_platform_t olpc_platform_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * OLPC board IDs contain the major build number within the mask 0x0ff0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * and the minor build number within 0x000f. Pre-builds have a minor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * number less than 8, and normal builds start at 8. For example, 0x0B10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * is a PreB1, and 0x0C18 is a C1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static inline uint32_t olpc_board(uint8_t id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return (id << 4) | 0x8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static inline uint32_t olpc_board_pre(uint8_t id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return id << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static inline int machine_is_olpc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * The DCON is OLPC's Display Controller. It has a number of unique
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * features that we might want to take advantage of..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static inline int olpc_has_dcon(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * The "Mass Production" version of OLPC's XO is identified as being model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * C2. During the prototype phase, the following models (in chronological
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * were based on Geode GX CPUs, and models after that were based upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Geode LX CPUs. There were also some hand-assembled models floating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * around, referred to as PreB1, PreB2, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline int olpc_board_at_least(uint32_t rev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return olpc_platform_info.boardrev >= rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int machine_is_olpc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline int olpc_has_dcon(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #ifdef CONFIG_OLPC_XO1_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) extern void do_olpc_suspend_lowlevel(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) extern void olpc_xo1_pm_wakeup_set(u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) extern void olpc_xo1_pm_wakeup_clear(u16 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) extern int pci_olpc_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* GPIO assignments */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define OLPC_GPIO_MIC_AC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define OLPC_GPIO_DCON_STAT0 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define OLPC_GPIO_DCON_STAT1 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define OLPC_GPIO_DCON_IRQ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define OLPC_GPIO_THRM_ALRM geode_gpio(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define OLPC_GPIO_DCON_LOAD 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define OLPC_GPIO_DCON_BLANK 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define OLPC_GPIO_SMB_CLK 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define OLPC_GPIO_SMB_DATA 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define OLPC_GPIO_WORKAUX geode_gpio(24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define OLPC_GPIO_LID 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define OLPC_GPIO_ECSCI 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #endif /* _ASM_X86_OLPC_H */