^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* Generic MTRR (Memory Type Range Register) ioctls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Copyright (C) 1997-1999 Richard Gooch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This library is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) modify it under the terms of the GNU Library General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) License as published by the Free Software Foundation; either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) version 2 of the License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This library is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Library General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) You should have received a copy of the GNU Library General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) License along with this library; if not, write to the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Richard Gooch may be reached by email at rgooch@atnf.csiro.au
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) The postal address is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifndef _ASM_X86_MTRR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define _ASM_X86_MTRR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <uapi/asm/mtrr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/memtype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * The following functions are for use by other drivers that cannot use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * arch_phys_wc_add and arch_phys_wc_del.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) # ifdef CONFIG_MTRR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern void mtrr_save_fixed_ranges(void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern void mtrr_save_state(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern int mtrr_add(unsigned long base, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int type, bool increment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern int mtrr_add_page(unsigned long base, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int type, bool increment);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern int mtrr_del(int reg, unsigned long base, unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern void mtrr_ap_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern void mtrr_bp_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern void set_mtrr_aps_delayed_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern void mtrr_aps_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) extern void mtrr_bp_restore(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern int amd_special_default_mtrr(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) # else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Return no-MTRRs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return MTRR_TYPE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define mtrr_save_fixed_ranges(arg) do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define mtrr_save_state() do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static inline int mtrr_add(unsigned long base, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int type, bool increment)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int mtrr_add_page(unsigned long base, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int type, bool increment)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static inline void mtrr_bp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pat_disable("PAT support disabled because CONFIG_MTRR is disabled in the kernel.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define mtrr_ap_init() do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define set_mtrr_aps_delayed_init() do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define mtrr_aps_init() do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define mtrr_bp_restore() do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) # endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct mtrr_sentry32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) compat_ulong_t base; /* Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) compat_uint_t size; /* Size of region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) compat_uint_t type; /* Type of region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct mtrr_gentry32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) compat_ulong_t regnum; /* Register number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) compat_uint_t base; /* Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) compat_uint_t size; /* Size of region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) compat_uint_t type; /* Type of region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define MTRR_IOCTL_BASE 'M'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define MTRRIOC32_KILL_PAGE_ENTRY \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #endif /* CONFIG_COMPAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Bit fields for enabled in struct mtrr_state_type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define MTRR_STATE_MTRR_FIXED_ENABLED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define MTRR_STATE_MTRR_ENABLED 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif /* _ASM_X86_MTRR_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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