Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * x86 KFENCE support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2020, Google LLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef _ASM_X86_KFENCE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define _ASM_X86_KFENCE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kfence.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/pgalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/set_memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Force 4K pages for __kfence_pool. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static inline bool arch_kfence_init_pool(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	for (addr = (unsigned long)__kfence_pool; is_kfence_address((void *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	     addr += PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		unsigned int level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		if (!lookup_address(addr, &level))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		if (level != PG_LEVEL_4K)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			set_memory_4k(addr, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Protect the given page and flush TLB. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static inline bool kfence_protect_page(unsigned long addr, bool protect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	unsigned int level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	pte_t *pte = lookup_address(addr, &level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	if (WARN_ON(!pte || level != PG_LEVEL_4K))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	 * We need to avoid IPIs, as we may get KFENCE allocations or faults
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	 * with interrupts disabled. Therefore, the below is best-effort, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	 * does not flush TLBs on all CPUs. We can tolerate some inaccuracy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 * lazy fault handling takes care of faults after the page is PRESENT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	if (protect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		set_pte(pte, __pte(pte_val(*pte) & ~_PAGE_PRESENT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		set_pte(pte, __pte(pte_val(*pte) | _PAGE_PRESENT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	 * Flush this CPU's TLB, assuming whoever did the allocation/free is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	 * likely to continue running on this CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	flush_tlb_one_kernel(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #endif /* _ASM_X86_KFENCE_H */