Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_IRQDOMAIN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_IRQDOMAIN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifdef CONFIG_X86_LOCAL_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	/* Allocate contiguous CPU vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	X86_IRQ_ALLOC_CONTIGUOUS_VECTORS		= 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	X86_IRQ_ALLOC_LEGACY				= 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) extern struct irq_domain *x86_vector_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) extern void init_irq_alloc_info(struct irq_alloc_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 				const struct cpumask *mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern void copy_irq_alloc_info(struct irq_alloc_info *dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 				struct irq_alloc_info *src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif /* CONFIG_X86_LOCAL_APIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifdef CONFIG_X86_IO_APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct device_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum ioapic_domain_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	IOAPIC_DOMAIN_INVALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	IOAPIC_DOMAIN_LEGACY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	IOAPIC_DOMAIN_STRICT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	IOAPIC_DOMAIN_DYNAMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct ioapic_domain_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	enum ioapic_domain_type		type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	const struct irq_domain_ops	*ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct device_node		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern const struct irq_domain_ops mp_ioapic_irqdomain_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			      unsigned int nr_irqs, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			      unsigned int nr_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern int mp_irqdomain_activate(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 				 struct irq_data *irq_data, bool reserve);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern void mp_irqdomain_deactivate(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 				    struct irq_data *irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif /* CONFIG_X86_IO_APIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifdef CONFIG_PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void x86_create_pci_msi_domain(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct irq_domain *native_create_pci_msi_domain(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) extern struct irq_domain *x86_pci_msi_default_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline void x86_create_pci_msi_domain(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define native_create_pci_msi_domain	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define x86_pci_msi_default_domain	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #endif