^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_X86_INTEL_FAMILY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_X86_INTEL_FAMILY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * "Big Core" Processors (Branded as Core, Xeon, etc...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * While adding a new CPUID for a new microarchitecture, add a new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * group to keep logically sorted out in chronological order. Within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * that group keep the CPUID for the variants sorted by model number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * The defined symbol names have the following form:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * OPTFAMILY Describes the family of CPUs that this belongs to. Default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * is assumed to be "_CORE" (and should be omitted). Other values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * currently in use are _ATOM and _XEON_PHI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * MICROARCH Is the code name for the micro-architecture for this core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * N.B. Not the platform name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * OPTDIFF If needed, a short string to differentiate by market segment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Common OPTDIFFs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * - regular client parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * _L - regular mobile parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * _G - parts with extra graphics on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * _X - regular server parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * _D - micro server parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Historical OPTDIFFs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * _EP - 2 socket server parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * _EX - 4+ socket server parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * The #define line may optionally include a comment including platform names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define INTEL_FAM6_ANY X86_MODEL_ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define INTEL_FAM6_CORE_YONAH 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define INTEL_FAM6_CORE2_MEROM 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define INTEL_FAM6_CORE2_MEROM_L 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define INTEL_FAM6_CORE2_PENRYN 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define INTEL_FAM6_CORE2_DUNNINGTON 0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define INTEL_FAM6_NEHALEM 0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define INTEL_FAM6_NEHALEM_EP 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define INTEL_FAM6_NEHALEM_EX 0x2E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define INTEL_FAM6_WESTMERE 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define INTEL_FAM6_WESTMERE_EP 0x2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define INTEL_FAM6_WESTMERE_EX 0x2F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define INTEL_FAM6_SANDYBRIDGE 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define INTEL_FAM6_SANDYBRIDGE_X 0x2D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define INTEL_FAM6_IVYBRIDGE 0x3A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define INTEL_FAM6_IVYBRIDGE_X 0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define INTEL_FAM6_HASWELL 0x3C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define INTEL_FAM6_HASWELL_X 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define INTEL_FAM6_HASWELL_L 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define INTEL_FAM6_HASWELL_G 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define INTEL_FAM6_BROADWELL 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define INTEL_FAM6_BROADWELL_G 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define INTEL_FAM6_BROADWELL_X 0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define INTEL_FAM6_BROADWELL_D 0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define INTEL_FAM6_SKYLAKE_L 0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define INTEL_FAM6_SKYLAKE 0x5E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define INTEL_FAM6_SKYLAKE_X 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INTEL_FAM6_KABYLAKE_L 0x8E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define INTEL_FAM6_KABYLAKE 0x9E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define INTEL_FAM6_CANNONLAKE_L 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define INTEL_FAM6_ICELAKE_X 0x6A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define INTEL_FAM6_ICELAKE_D 0x6C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define INTEL_FAM6_ICELAKE 0x7D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define INTEL_FAM6_ICELAKE_L 0x7E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define INTEL_FAM6_ICELAKE_NNPI 0x9D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define INTEL_FAM6_TIGERLAKE_L 0x8C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define INTEL_FAM6_TIGERLAKE 0x8D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define INTEL_FAM6_COMETLAKE 0xA5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define INTEL_FAM6_COMETLAKE_L 0xA6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define INTEL_FAM6_ROCKETLAKE 0xA7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Hybrid Core/Atom Processors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define INTEL_FAM6_LAKEFIELD 0x8A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define INTEL_FAM6_ALDERLAKE 0x97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define INTEL_FAM6_ALDERLAKE_L 0x9A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* "Small Core" Processors (Atom) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Note: the micro-architecture is "Goldmont Plus" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Xeon Phi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Family 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif /* _ASM_X86_INTEL_FAMILY_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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