^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Specification (TLFS):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _ASM_X86_HYPERV_TLFS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _ASM_X86_HYPERV_TLFS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define HYPERV_CPUID_INTERFACE 0x40000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define HYPERV_CPUID_VERSION 0x40000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define HYPERV_CPUID_FEATURES 0x40000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HYPERV_CPUID_NESTED_FEATURES 0x4000000A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define HYPERV_CPUID_MIN 0x40000005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define HYPERV_CPUID_MAX 0x4000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Group D Features. The bit assignments are custom to each architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * On x86/x64 these are HYPERV_CPUID_FEATURES.EDX bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* The MWAIT instruction is available (per section MONITOR / MWAIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define HV_X64_MWAIT_AVAILABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Guest debugging support is available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define HV_X64_GUEST_DEBUGGING_AVAILABLE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Performance Monitor support is available*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define HV_X64_PERF_MONITOR_AVAILABLE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Support for physical CPU dynamic partitioning events is available*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Support for passing hypercall input parameter block via XMM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * registers is available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Support for a virtual guest idle state is available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define HV_X64_GUEST_IDLE_STATE_AVAILABLE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Frequency MSRs available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Crash MSR available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Support for debug MSRs available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define HV_FEATURE_DEBUG_MSRS_AVAILABLE BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* stimer Direct Mode is available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Implementation recommendations. Indicates which behaviors the hypervisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * recommends the OS implement for optimal performance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * These are HYPERV_CPUID_ENLIGHTMENT_INFO.EAX bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Recommend using hypercall for address space switches rather
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * than MOV to CR3 instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define HV_X64_AS_SWITCH_RECOMMENDED BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Recommend using hypercall for local TLB flushes rather
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * than INVLPG or MOV to CR3 instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Recommend using hypercall for remote TLB flushes rather
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * than inter-processor interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * Recommend using MSRs for accessing APIC registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * EOI, ICR and TPR rather than their memory-mapped counterparts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define HV_X64_APIC_ACCESS_RECOMMENDED BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Recommend using the hypervisor-provided MSR to initiate a system RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define HV_X64_SYSTEM_RESET_RECOMMENDED BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Recommend using relaxed timing for this partition. If used,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * the VM should disable any watchdog timeouts that rely on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * timely delivery of external interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define HV_X64_RELAXED_TIMING_RECOMMENDED BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * Recommend not using Auto End-Of-Interrupt feature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define HV_DEPRECATING_AEOI_RECOMMENDED BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Recommend using cluster IPI hypercalls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define HV_X64_CLUSTER_IPI_RECOMMENDED BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* Recommend using the newer ExProcessorMasks interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Recommend using enlightened VMCS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Virtual processor will never share a physical core with another virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * processor, except for virtual processors that are reported as sibling SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * threads.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define HV_X64_NO_NONARCH_CORESHARING BIT(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Nested features. These are HYPERV_CPUID_NESTED_FEATURES.EAX bits. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define HV_X64_NESTED_DIRECT_FLUSH BIT(17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define HV_X64_NESTED_MSR_BITMAP BIT(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Hyper-V specific model specific registers (MSRs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* MSR used to identify the guest OS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define HV_X64_MSR_GUEST_OS_ID 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* MSR used to setup pages used to communicate with the hypervisor. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define HV_X64_MSR_HYPERCALL 0x40000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* MSR used to provide vcpu index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define HV_X64_MSR_VP_INDEX 0x40000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* MSR used to reset the guest OS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define HV_X64_MSR_RESET 0x40000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* MSR used to provide vcpu runtime in 100ns units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define HV_X64_MSR_VP_RUNTIME 0x40000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* MSR used to read the per-partition time reference counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define HV_X64_MSR_TIME_REF_COUNT 0x40000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* A partition's reference time stamp counter (TSC) page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define HV_X64_MSR_REFERENCE_TSC 0x40000021
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* MSR used to retrieve the TSC frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define HV_X64_MSR_TSC_FREQUENCY 0x40000022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* MSR used to retrieve the local APIC timer frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define HV_X64_MSR_APIC_FREQUENCY 0x40000023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Define the virtual APIC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define HV_X64_MSR_EOI 0x40000070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define HV_X64_MSR_ICR 0x40000071
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define HV_X64_MSR_TPR 0x40000072
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Define synthetic interrupt controller model specific registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define HV_X64_MSR_SCONTROL 0x40000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define HV_X64_MSR_SVERSION 0x40000081
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define HV_X64_MSR_SIEFP 0x40000082
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define HV_X64_MSR_SIMP 0x40000083
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define HV_X64_MSR_EOM 0x40000084
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define HV_X64_MSR_SINT0 0x40000090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define HV_X64_MSR_SINT1 0x40000091
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define HV_X64_MSR_SINT2 0x40000092
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define HV_X64_MSR_SINT3 0x40000093
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define HV_X64_MSR_SINT4 0x40000094
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define HV_X64_MSR_SINT5 0x40000095
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define HV_X64_MSR_SINT6 0x40000096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define HV_X64_MSR_SINT7 0x40000097
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define HV_X64_MSR_SINT8 0x40000098
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define HV_X64_MSR_SINT9 0x40000099
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define HV_X64_MSR_SINT10 0x4000009A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define HV_X64_MSR_SINT11 0x4000009B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define HV_X64_MSR_SINT12 0x4000009C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define HV_X64_MSR_SINT13 0x4000009D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define HV_X64_MSR_SINT14 0x4000009E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define HV_X64_MSR_SINT15 0x4000009F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * Synthetic Timer MSRs. Four timers per vcpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define HV_X64_MSR_STIMER0_COUNT 0x400000B1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define HV_X64_MSR_STIMER1_COUNT 0x400000B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define HV_X64_MSR_STIMER2_COUNT 0x400000B5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define HV_X64_MSR_STIMER3_COUNT 0x400000B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Hyper-V guest idle MSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define HV_X64_MSR_GUEST_IDLE 0x400000F0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* Hyper-V guest crash notification MSR's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define HV_X64_MSR_CRASH_P0 0x40000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define HV_X64_MSR_CRASH_P1 0x40000101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define HV_X64_MSR_CRASH_P2 0x40000102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define HV_X64_MSR_CRASH_P3 0x40000103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define HV_X64_MSR_CRASH_P4 0x40000104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define HV_X64_MSR_CRASH_CTL 0x40000105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* TSC emulation after migration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* TSC invariant control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * Declare the MSR used to setup pages used to communicate with the hypervisor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) union hv_x64_msr_hypercall_contents {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u64 as_uint64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u64 enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u64 reserved:11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u64 guest_physical_address:52;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct hv_reenlightenment_control {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) __u64 vector:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) __u64 reserved1:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) __u64 enabled:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) __u64 reserved2:15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) __u64 target_vp:32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct hv_tsc_emulation_control {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) __u64 enabled:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) __u64 reserved:63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct hv_tsc_emulation_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) __u64 inprogress:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) __u64 reserved:63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define HV_X64_MSR_CRASH_PARAMS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) (1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define HV_IPI_LOW_VECTOR 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define HV_IPI_HIGH_VECTOR 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) (~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* Hyper-V Enlightened VMCS version mask in nested features CPUID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define HV_X64_ENLIGHTENED_VMCS_VERSION 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* Define hypervisor message types. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) enum hv_message_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) HVMSG_NONE = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Memory access messages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) HVMSG_UNMAPPED_GPA = 0x80000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) HVMSG_GPA_INTERCEPT = 0x80000001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* Timer notification messages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) HVMSG_TIMER_EXPIRED = 0x80000010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Error messages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Trace buffer complete messages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* Platform-specific processor intercept messages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) HVMSG_X64_MSR_INTERCEPT = 0x80010001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) HVMSG_X64_APIC_EOI = 0x80010004,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct hv_nested_enlightenments_control {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) __u32 directhypercall:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) __u32 reserved:31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) } features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) __u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) } hypercallControls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* Define virtual processor assist page structure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct hv_vp_assist_page {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) __u32 apic_assist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) __u32 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) __u64 vtl_control[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct hv_nested_enlightenments_control nested_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) __u8 enlighten_vmentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) __u8 reserved2[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) __u64 current_nested_vmcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct hv_enlightened_vmcs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u32 revision_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u32 abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u16 host_es_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u16 host_cs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) u16 host_ss_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) u16 host_ds_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) u16 host_fs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) u16 host_gs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) u16 host_tr_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u16 padding16_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u64 host_ia32_pat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u64 host_ia32_efer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u64 host_cr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u64 host_cr3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u64 host_cr4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) u64 host_ia32_sysenter_esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) u64 host_ia32_sysenter_eip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u64 host_rip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) u32 host_ia32_sysenter_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) u32 pin_based_vm_exec_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) u32 vm_exit_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) u32 secondary_vm_exec_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) u64 io_bitmap_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) u64 io_bitmap_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u64 msr_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) u16 guest_es_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u16 guest_cs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) u16 guest_ss_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) u16 guest_ds_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) u16 guest_fs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u16 guest_gs_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) u16 guest_ldtr_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u16 guest_tr_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) u32 guest_es_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u32 guest_cs_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u32 guest_ss_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u32 guest_ds_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u32 guest_fs_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u32 guest_gs_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 guest_ldtr_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) u32 guest_tr_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u32 guest_gdtr_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u32 guest_idtr_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u32 guest_es_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u32 guest_cs_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u32 guest_ss_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u32 guest_ds_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) u32 guest_fs_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u32 guest_gs_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) u32 guest_ldtr_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u32 guest_tr_ar_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u64 guest_es_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u64 guest_cs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u64 guest_ss_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u64 guest_ds_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) u64 guest_fs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u64 guest_gs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u64 guest_ldtr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u64 guest_tr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u64 guest_gdtr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) u64 guest_idtr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u64 padding64_1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) u64 vm_exit_msr_store_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u64 vm_exit_msr_load_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) u64 vm_entry_msr_load_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u64 cr3_target_value0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u64 cr3_target_value1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u64 cr3_target_value2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u64 cr3_target_value3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) u32 page_fault_error_code_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) u32 page_fault_error_code_match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u32 cr3_target_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) u32 vm_exit_msr_store_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u32 vm_exit_msr_load_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) u32 vm_entry_msr_load_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u64 tsc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) u64 virtual_apic_page_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u64 vmcs_link_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u64 guest_ia32_debugctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u64 guest_ia32_pat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u64 guest_ia32_efer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u64 guest_pdptr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u64 guest_pdptr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u64 guest_pdptr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) u64 guest_pdptr3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u64 guest_pending_dbg_exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) u64 guest_sysenter_esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) u64 guest_sysenter_eip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) u32 guest_activity_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) u32 guest_sysenter_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) u64 cr0_guest_host_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) u64 cr4_guest_host_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u64 cr0_read_shadow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u64 cr4_read_shadow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u64 guest_cr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u64 guest_cr3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u64 guest_cr4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) u64 guest_dr7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u64 host_fs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u64 host_gs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) u64 host_tr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) u64 host_gdtr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) u64 host_idtr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) u64 host_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u64 ept_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u16 virtual_processor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u16 padding16_2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) u64 padding64_2[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u64 guest_physical_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) u32 vm_instruction_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u32 vm_exit_reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) u32 vm_exit_intr_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) u32 vm_exit_intr_error_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u32 idt_vectoring_info_field;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) u32 idt_vectoring_error_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) u32 vm_exit_instruction_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) u32 vmx_instruction_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) u64 exit_qualification;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) u64 exit_io_instruction_ecx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) u64 exit_io_instruction_esi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) u64 exit_io_instruction_edi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) u64 exit_io_instruction_eip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) u64 guest_linear_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) u64 guest_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) u64 guest_rflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u32 guest_interruptibility_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u32 cpu_based_vm_exec_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) u32 exception_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) u32 vm_entry_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u32 vm_entry_intr_info_field;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u32 vm_entry_exception_error_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) u32 vm_entry_instruction_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u32 tpr_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u64 guest_rip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u32 hv_clean_fields;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) u32 hv_padding_32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u32 hv_synthetic_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) u32 nested_flush_hypercall:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) u32 msr_bitmap:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) u32 reserved:30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) } __packed hv_enlightenments_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) u32 hv_vp_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) u64 hv_vm_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) u64 partition_assist_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) u64 padding64_4[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) u64 guest_bndcfgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u64 padding64_5[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u64 xss_exit_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u64 padding64_6[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_MSR_BITMAP BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1 BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_PROC BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_ENTRY BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EXCPN BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1 BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2 BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1 BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ENLIGHTENMENTSCONTROL BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) struct hv_partition_assist_pg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) u32 tlb_lock_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #include <asm-generic/hyperv-tlfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) #endif