Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef _ASM_X86_HPET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define _ASM_X86_HPET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #ifdef CONFIG_HPET_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define HPET_MMAP_SIZE		1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define HPET_ID			0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define HPET_PERIOD		0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define HPET_CFG		0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define HPET_STATUS		0x020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define HPET_COUNTER		0x0f0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define HPET_Tn_CFG(n)		(0x100 + 0x20 * n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define HPET_Tn_CMP(n)		(0x108 + 0x20 * n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define HPET_Tn_ROUTE(n)	(0x110 + 0x20 * n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define HPET_T0_CFG		0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define HPET_T0_CMP		0x108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define HPET_T0_ROUTE		0x110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define HPET_T1_CFG		0x120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define HPET_T1_CMP		0x128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define HPET_T1_ROUTE		0x130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define HPET_T2_CFG		0x140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define HPET_T2_CMP		0x148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define HPET_T2_ROUTE		0x150
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define HPET_ID_REV		0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define HPET_ID_NUMBER		0x00001f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define HPET_ID_64BIT		0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define HPET_ID_LEGSUP		0x00008000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define HPET_ID_VENDOR		0xffff0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define	HPET_ID_NUMBER_SHIFT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define HPET_ID_VENDOR_SHIFT	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define HPET_CFG_ENABLE		0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define HPET_CFG_LEGACY		0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define	HPET_LEGACY_8254	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define	HPET_LEGACY_RTC		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define HPET_TN_LEVEL		0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define HPET_TN_ENABLE		0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define HPET_TN_PERIODIC	0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define HPET_TN_PERIODIC_CAP	0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define HPET_TN_64BIT_CAP	0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define HPET_TN_SETVAL		0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define HPET_TN_32BIT		0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define HPET_TN_ROUTE		0x3e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define HPET_TN_FSB		0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define HPET_TN_FSB_CAP		0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define HPET_TN_ROUTE_SHIFT	9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /* Max HPET Period is 10^8 femto sec as in HPET spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define HPET_MAX_PERIOD		100000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define HPET_MIN_PERIOD		100000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /* hpet memory map physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) extern unsigned long hpet_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) extern unsigned long force_hpet_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) extern bool boot_hpet_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) extern u8 hpet_blockid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) extern bool hpet_force_user;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) extern bool hpet_msi_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) extern int is_hpet_enabled(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) extern int hpet_enable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) extern void hpet_disable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) extern unsigned int hpet_readl(unsigned int a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) extern void force_hpet_resume(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) struct irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) struct hpet_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) struct irq_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) extern void hpet_msi_unmask(struct irq_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) extern void hpet_msi_mask(struct irq_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) extern void hpet_msi_write(struct hpet_channel *hc, struct msi_msg *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) extern struct irq_domain *hpet_create_irq_domain(int hpet_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) extern int hpet_assign_irq(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			   struct hpet_channel *hc, int dev_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #ifdef CONFIG_HPET_EMULATE_RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			       unsigned char sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) extern int hpet_set_periodic_freq(unsigned long freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) extern int hpet_rtc_dropped_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) extern int hpet_rtc_timer_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) extern int hpet_register_irq_handler(rtc_irq_handler handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif /* CONFIG_HPET_EMULATE_RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #else /* CONFIG_HPET_TIMER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static inline int hpet_enable(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline int is_hpet_enabled(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define hpet_readl(a) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define default_setup_hpet_msi	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif /* _ASM_X86_HPET_H */