Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Architecture specific parts of the Floppy driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1995
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifndef _ASM_X86_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define _ASM_X86_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * The DMA channel used by the floppy controller cannot access data at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * addresses >= 16MB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * Went back to the 1MB limit, as some people had problems with the floppy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * driver otherwise. It doesn't matter much for performance anyway, as most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * floppy accesses go through the track buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define _CROSS_64KB(a, s, vdma)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	(!(vdma) &&							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	 ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define CROSS_64KB(a, s) _CROSS_64KB(a, s, use_virtual_dma & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define SW fd_routine[use_virtual_dma & 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define CSW fd_routine[can_use_virtual_dma & 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define fd_inb(base, reg)		inb_p((base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define fd_outb(value, base, reg)	outb_p(value, (base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define fd_request_dma()	CSW._request_dma(FLOPPY_DMA, "floppy")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define fd_free_dma()		CSW._free_dma(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define fd_enable_irq()		enable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define fd_disable_irq()	disable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define fd_free_irq()		free_irq(FLOPPY_IRQ, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define fd_get_dma_residue()	SW._get_dma_residue(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define fd_dma_mem_alloc(size)	SW._dma_mem_alloc(size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define FLOPPY_CAN_FALLBACK_ON_NODMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static char *virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static int virtual_dma_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int doing_pdma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static irqreturn_t floppy_hardint(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned char st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #undef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	static int calls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	static int bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	static int dma_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (!doing_pdma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		return floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (!calls)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		bytes = virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		int lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		char *lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		st = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		for (lcount = virtual_dma_count, lptr = virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		     lcount; lcount--, lptr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			st &= STATUS_DMA | STATUS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			if (st != (STATUS_DMA | STATUS_READY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			if (virtual_dma_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				outb_p(*lptr, virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				*lptr = inb_p(virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		virtual_dma_count = lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		virtual_dma_addr = lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	calls++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (st == STATUS_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!(st & STATUS_DMA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		virtual_dma_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		printk(KERN_DEBUG "count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		       virtual_dma_count, virtual_dma_residue, calls, bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		       dma_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		calls = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		dma_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (!virtual_dma_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		dma_wait++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static void fd_disable_dma(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (!(can_use_virtual_dma & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		disable_dma(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	virtual_dma_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int vdma_request_dma(unsigned int dmanr, const char *device_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void vdma_nop(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int vdma_get_dma_residue(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	return virtual_dma_count + virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int fd_request_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (can_use_virtual_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return request_irq(FLOPPY_IRQ, floppy_hardint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 				   0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		return request_irq(FLOPPY_IRQ, floppy_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				   0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static unsigned long dma_mem_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	return __get_dma_pages(GFP_KERNEL|__GFP_NORETRY, get_order(size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static unsigned long vdma_mem_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	return (unsigned long)vmalloc(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define nodma_mem_alloc(size) vdma_mem_alloc(size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if ((unsigned long)addr >= (unsigned long)high_memory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		vfree((void *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		free_pages(addr, get_order(size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define fd_dma_mem_free(addr, size)  _fd_dma_mem_free(addr, size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void _fd_chose_dma_mode(char *addr, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (can_use_virtual_dma == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		if ((unsigned long)addr >= (unsigned long)high_memory ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		    isa_virt_to_bus(addr) >= 0x1000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		    _CROSS_64KB(addr, size, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 			use_virtual_dma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			use_virtual_dma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		use_virtual_dma = can_use_virtual_dma & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	doing_pdma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	virtual_dma_port = io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	virtual_dma_mode = (mode == DMA_MODE_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	virtual_dma_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	virtual_dma_count = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	virtual_dma_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #ifdef FLOPPY_SANITY_CHECK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	if (CROSS_64KB(addr, size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	/* actual, physical DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	clear_dma_ff(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	set_dma_mode(FLOPPY_DMA, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	set_dma_addr(FLOPPY_DMA, isa_virt_to_bus(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	set_dma_count(FLOPPY_DMA, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	enable_dma(FLOPPY_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static struct fd_routine_l {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int (*_request_dma)(unsigned int dmanr, const char *device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	void (*_free_dma)(unsigned int dmanr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	int (*_get_dma_residue)(unsigned int dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	unsigned long (*_dma_mem_alloc)(unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) } fd_routine[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		._request_dma		= request_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		._free_dma		= free_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		._get_dma_residue	= get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		._dma_mem_alloc		= dma_mem_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		._dma_setup		= hard_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		._request_dma		= vdma_request_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		._free_dma		= vdma_nop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		._get_dma_residue	= vdma_get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		._dma_mem_alloc		= vdma_mem_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		._dma_setup		= vdma_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int FDC1 = 0x3f0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int FDC2 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)  * Floppy types are stored in the rtc's CMOS RAM and so rtc_lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)  * is needed to prevent corrupted CMOS RAM in case "insmod floppy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)  * coincides with another rtc CMOS user.		Paul G.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define FLOPPY0_TYPE					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ({							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	unsigned long flags;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	unsigned char val;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	spin_lock_irqsave(&rtc_lock, flags);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	val = (CMOS_READ(0x10) >> 4) & 15;		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	spin_unlock_irqrestore(&rtc_lock, flags);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	val;						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define FLOPPY1_TYPE					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ({							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	unsigned long flags;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	unsigned char val;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	spin_lock_irqsave(&rtc_lock, flags);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	val = CMOS_READ(0x10) & 15;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	spin_unlock_irqrestore(&rtc_lock, flags);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	val;						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define N_FDC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define N_DRIVE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define EXTRA_FLOPPY_PARAMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #endif /* _ASM_X86_FLOPPY_H */