^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_X86_DEBUGREG_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_X86_DEBUGREG_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <uapi/asm/debugreg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) DECLARE_PER_CPU(unsigned long, cpu_dr7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef CONFIG_PARAVIRT_XXL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * These special macros can be used to get or set a debugging register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define get_debugreg(var, register) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) (var) = native_get_debugreg(register)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define set_debugreg(value, register) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) native_set_debugreg(register, value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static __always_inline unsigned long native_get_debugreg(int regno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long val = 0; /* Damn you, gcc! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) switch (regno) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) asm("mov %%db0, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) asm("mov %%db1, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) asm("mov %%db2, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) asm("mov %%db3, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) asm("mov %%db6, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) asm("mov %%db7, %0" :"=r" (val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static __always_inline void native_set_debugreg(int regno, unsigned long value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) switch (regno) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) asm("mov %0, %%db0" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) asm("mov %0, %%db1" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) asm("mov %0, %%db2" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) asm("mov %0, %%db3" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) asm("mov %0, %%db6" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) asm("mov %0, %%db7" ::"r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline void hw_breakpoint_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* Zero the control register for HW Breakpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) set_debugreg(0UL, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Zero-out the individual HW breakpoint address registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) set_debugreg(0UL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) set_debugreg(0UL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) set_debugreg(0UL, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) set_debugreg(0UL, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static __always_inline bool hw_breakpoint_active(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return __this_cpu_read(cpu_dr7) & DR_GLOBAL_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) extern void hw_breakpoint_restore(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static __always_inline unsigned long local_db_save(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long dr7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (static_cpu_has(X86_FEATURE_HYPERVISOR) && !hw_breakpoint_active())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) get_debugreg(dr7, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dr7 &= ~0x400; /* architecturally set bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (dr7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) set_debugreg(0, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Ensure the compiler doesn't lower the above statements into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * the critical section; disabling breakpoints late would not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * be good.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return dr7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static __always_inline void local_db_restore(unsigned long dr7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Ensure the compiler doesn't raise this statement into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * the critical section; enabling breakpoints early would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * not be good.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (dr7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) set_debugreg(dr7, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #ifdef CONFIG_CPU_SUP_AMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) extern void set_dr_addr_mask(unsigned long mask, int dr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static inline void set_dr_addr_mask(unsigned long mask, int dr) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #endif /* _ASM_X86_DEBUGREG_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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