^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * X86 specific ACPICA environments and implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Lv Zheng <lv.zheng@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _ASM_X86_ACENV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _ASM_X86_ACENV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/special_insns.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Asm macros */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ACPI_FLUSH_CPU_CACHE() wbinvd()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int __acpi_acquire_global_lock(unsigned int *lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int __acpi_release_global_lock(unsigned int *lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ((Acq) = __acpi_release_global_lock(&facs->global_lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Math helper asm macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) asm("divl %2;" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) : "=a"(q32), "=d"(r32) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) : "r"(d32), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "0"(n_lo), "1"(n_hi))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) asm("shrl $1,%2 ;" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "rcrl $1,%3;" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) : "=r"(n_hi), "=r"(n_lo) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) : "0"(n_hi), "1"(n_lo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif /* _ASM_X86_ACENV_H */