Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* -*- linux-c -*- ------------------------------------------------------- *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *   Copyright (C) 1991, 1992 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *   Copyright 2007 rPath, Inc. - All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Header file for the real-mode video probing code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #ifndef BOOT_VIDEO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define BOOT_VIDEO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * This code uses an extended set of video mode numbers. These include:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * Aliases for standard modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *      NORMAL_VGA (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *      EXTENDED_VGA (-2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  *      ASK_VGA (-3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * Video modes numbered by menu position -- NOT RECOMMENDED because of lack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * of compatibility when extending the table. These are between 0x00 and 0xff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define VIDEO_FIRST_MENU 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* Standard BIOS video modes (BIOS number + 0x0100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define VIDEO_FIRST_BIOS 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* VESA BIOS video modes (VESA number + 0x0200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define VIDEO_FIRST_VESA 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* Video7 special modes (BIOS number + 0x0900) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define VIDEO_FIRST_V7 0x0900
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* Special video modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define VIDEO_FIRST_SPECIAL 0x0f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define VIDEO_80x25 0x0f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define VIDEO_8POINT 0x0f01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define VIDEO_80x43 0x0f02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define VIDEO_80x28 0x0f03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define VIDEO_CURRENT_MODE 0x0f04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define VIDEO_80x30 0x0f05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define VIDEO_80x34 0x0f06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define VIDEO_80x60 0x0f07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define VIDEO_GFX_HACK 0x0f08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define VIDEO_LAST_SPECIAL 0x0f09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) /* Video modes given by resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define VIDEO_FIRST_RESOLUTION 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) /* The "recalculate timings" flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define VIDEO_RECALC 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) void store_screen(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define DO_STORE() store_screen()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * Mode table structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct mode_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u16 mode;		/* Mode number (vga= style) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u16 x, y;		/* Width, height */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u16 depth;		/* Bits per pixel, 0 for text mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) struct card_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	const char *card_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	int (*set_mode)(struct mode_info *mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	int (*probe)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct mode_info *modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	int nmodes;		/* Number of probed modes so far */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int unsafe;		/* Probing is unsafe, only do after "scan" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	u16 xmode_first;	/* Unprobed modes to try to call anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	u16 xmode_n;		/* Size of unprobed mode range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define __videocard struct card_info __section(".videocards") __attribute__((used))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) extern struct card_info video_cards[], video_cards_end[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) int mode_defined(u16 mode);	/* video.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) /* Basic video information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define ADAPTER_CGA	0	/* CGA/MDA/HGC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define ADAPTER_EGA	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define ADAPTER_VGA	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) extern int adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) extern int force_x, force_y;	/* Don't query the BIOS for cols/rows */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) extern int do_restore;		/* Restore screen contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) extern int graphic_mode;	/* Graphics mode with linear frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) /* Accessing VGA indexed registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) static inline u8 in_idx(u16 port, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	outb(index, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	return inb(port+1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static inline void out_idx(u8 v, u16 port, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	outw(index+(v << 8), port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Writes a value to an indexed port and then reads the port again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline u8 tst_idx(u8 v, u16 port, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	out_idx(port, index, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	return in_idx(port, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Get the I/O port of the VGA CRTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u16 vga_crtc(void);		/* video-vga.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif /* BOOT_VIDEO_H */