^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* -*- linux-c -*- ------------------------------------------------------- *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 1991, 1992 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2007 rPath, Inc. - All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2009 Intel Corporation; author H. Peter Anvin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * ----------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * VESA text modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "boot.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "video.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "vesa.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "string.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* VESA information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static struct vesa_general_info vginfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static struct vesa_mode_info vminfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static __videocard video_vesa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #ifndef _WAKEUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static void vesa_store_mode_params_graphics(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #else /* _WAKEUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static inline void vesa_store_mode_params_graphics(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #endif /* _WAKEUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int vesa_probe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct biosregs ireg, oreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u16 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) addr_t mode_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct mode_info *mi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int nmodes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) video_vesa.modes = GET_HEAP(struct mode_info, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ireg.ax = 0x4f00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ireg.di = (size_t)&vginfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (oreg.ax != 0x004f ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) vginfo.signature != VESA_MAGIC ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) vginfo.version < 0x0102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return 0; /* Not present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) set_fs(vginfo.video_mode_ptr.seg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mode_ptr = vginfo.video_mode_ptr.off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) while ((mode = rdfs16(mode_ptr)) != 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) mode_ptr += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!heap_free(sizeof(struct mode_info)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) break; /* Heap full, can't save mode info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (mode & ~0x1ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ireg.ax = 0x4f01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ireg.cx = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ireg.di = (size_t)&vminfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (oreg.ax != 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if ((vminfo.mode_attr & 0x15) == 0x05) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Text Mode, TTY BIOS supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) supported by hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) mi = GET_HEAP(struct mode_info, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) mi->mode = mode + VIDEO_FIRST_VESA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) mi->depth = 0; /* text */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) mi->x = vminfo.h_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mi->y = vminfo.v_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) nmodes++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) } else if ((vminfo.mode_attr & 0x99) == 0x99 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) (vminfo.memory_layout == 4 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) vminfo.memory_layout == 6) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) vminfo.memory_planes == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #ifdef CONFIG_FB_BOOT_VESA_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Graphics mode, color, linear frame buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) supported. Only register the mode if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if framebuffer is configured, however,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) otherwise the user will be left without a screen. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) mi = GET_HEAP(struct mode_info, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) mi->mode = mode + VIDEO_FIRST_VESA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) mi->depth = vminfo.bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) mi->x = vminfo.h_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mi->y = vminfo.v_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) nmodes++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return nmodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int vesa_set_mode(struct mode_info *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct biosregs ireg, oreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int is_graphic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ireg.ax = 0x4f01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ireg.cx = vesa_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ireg.di = (size_t)&vminfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (oreg.ax != 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if ((vminfo.mode_attr & 0x15) == 0x05) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* It's a supported text mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) is_graphic = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #ifdef CONFIG_FB_BOOT_VESA_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) } else if ((vminfo.mode_attr & 0x99) == 0x99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* It's a graphics mode with linear frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) is_graphic = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) vesa_mode |= 0x4000; /* Request linear frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -1; /* Invalid mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ireg.ax = 0x4f02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ireg.bx = vesa_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (oreg.ax != 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) graphic_mode = is_graphic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (!is_graphic) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Text mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) force_x = mode->x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) force_y = mode->y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) do_restore = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* Graphics mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) vesa_store_mode_params_graphics();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #ifndef _WAKEUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Switch DAC to 8-bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void vesa_dac_set_8bits(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct biosregs ireg, oreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u8 dac_size = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* If possible, switch the DAC to 8-bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (vginfo.capabilities & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ireg.ax = 0x4f08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ireg.bh = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (oreg.ax == 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dac_size = oreg.bh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* Set the color sizes to the DAC size, and offsets to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) boot_params.screen_info.red_size = dac_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) boot_params.screen_info.green_size = dac_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) boot_params.screen_info.blue_size = dac_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) boot_params.screen_info.rsvd_size = dac_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) boot_params.screen_info.red_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) boot_params.screen_info.green_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) boot_params.screen_info.blue_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) boot_params.screen_info.rsvd_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Save the VESA protected mode info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void vesa_store_pm_info(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct biosregs ireg, oreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ireg.ax = 0x4f0a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (oreg.ax != 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) boot_params.screen_info.vesapm_seg = oreg.es;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) boot_params.screen_info.vesapm_off = oreg.di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * Save video mode parameters for graphics mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static void vesa_store_mode_params_graphics(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* Tell the kernel we're in VESA graphics mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) boot_params.screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* Mode parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) boot_params.screen_info.vesa_attributes = vminfo.mode_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) boot_params.screen_info.lfb_linelength = vminfo.logical_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) boot_params.screen_info.lfb_width = vminfo.h_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) boot_params.screen_info.lfb_height = vminfo.v_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) boot_params.screen_info.lfb_depth = vminfo.bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) boot_params.screen_info.pages = vminfo.image_planes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) boot_params.screen_info.lfb_base = vminfo.lfb_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) memcpy(&boot_params.screen_info.red_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) &vminfo.rmask, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* General parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) boot_params.screen_info.lfb_size = vginfo.total_memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (vminfo.bpp <= 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) vesa_dac_set_8bits();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) vesa_store_pm_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * Save EDID information for the kernel; this is invoked, separately,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * after mode-setting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) void vesa_store_edid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #ifdef CONFIG_FIRMWARE_EDID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct biosregs ireg, oreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /* Apparently used as a nonsense token... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) memset(&boot_params.edid_info, 0x13, sizeof(boot_params.edid_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (vginfo.version < 0x0200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return; /* EDID requires VBE 2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) initregs(&ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ireg.ax = 0x4f15; /* VBE DDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* ireg.bx = 0x0000; */ /* Report DDC capabilities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* ireg.cx = 0; */ /* Controller 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ireg.es = 0; /* ES:DI must be 0 by spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (oreg.ax != 0x004f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return; /* No EDID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /* BH = time in seconds to transfer EDD information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* BL = DDC level supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ireg.ax = 0x4f15; /* VBE DDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ireg.bx = 0x0001; /* Read EDID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* ireg.cx = 0; */ /* Controller 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* ireg.dx = 0; */ /* EDID block number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ireg.es = ds();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) intcall(0x10, &ireg, &oreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #endif /* CONFIG_FIRMWARE_EDID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #endif /* not _WAKEUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static __videocard video_vesa =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .card_name = "VESA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .probe = vesa_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .set_mode = vesa_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .xmode_first = VIDEO_FIRST_VESA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .xmode_n = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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