^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AMD Encrypted Register State Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Joerg Roedel <jroedel@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * misc.h needs to be first because it knows how to include the other kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * headers in the pre-decompression code in a way that does not break
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * compilation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "misc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/pgtable_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/sev-es.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/trapnr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/trap_pf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/msr-index.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/fpu/xcr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/svm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "error.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct ghcb *boot_ghcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Copy a version of this function here - insn-eval.c can't be used in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * pre-decompression code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static bool insn_has_rep_prefix(struct insn *insn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) insn_byte_t p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) insn_get_prefixes(insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) for_each_insn_prefix(insn, i, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (p == 0xf2 || p == 0xf3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Only a dummy for insn_get_seg_base() - Early boot-code is 64bit only and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * doesn't use segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return 0UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline u64 sev_es_rd_ghcb_msr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned long low, high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) asm volatile("rdmsr" : "=a" (low), "=d" (high) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) "c" (MSR_AMD64_SEV_ES_GHCB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return ((high << 32) | low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline void sev_es_wr_ghcb_msr(u64 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 low, high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) low = val & 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) high = val >> 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) asm volatile("wrmsr" : : "c" (MSR_AMD64_SEV_ES_GHCB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) "a"(low), "d" (high) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) char buffer[MAX_INSN_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) enum es_result ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) memcpy(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) insn_init(&ctxt->insn, buffer, MAX_INSN_SIZE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) insn_get_length(&ctxt->insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = ctxt->insn.immediate.got ? ES_OK : ES_DECODE_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void *dst, char *buf, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) memcpy(dst, buf, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return ES_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void *src, char *buf, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) memcpy(buf, src, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return ES_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #undef __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #undef __pa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define __pa(x) ((unsigned long)(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define __BOOT_COMPRESSED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Basic instruction decoding support needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #include "../../lib/inat.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #include "../../lib/insn.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Include code for early handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #include "../../kernel/sev-es-shared.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static bool early_setup_sev_es(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!sev_es_negotiate_protocol())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) sev_es_terminate(GHCB_SEV_ES_REASON_PROTOCOL_UNSUPPORTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (set_page_decrypted((unsigned long)&boot_ghcb_page))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Page is now mapped decrypted, clear it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) memset(&boot_ghcb_page, 0, sizeof(boot_ghcb_page));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) boot_ghcb = &boot_ghcb_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Initialize lookup tables for the instruction decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) inat_init_tables();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void sev_es_shutdown_ghcb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (!boot_ghcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (!sev_es_check_cpu_features())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) error("SEV-ES CPU Features missing.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * GHCB Page must be flushed from the cache and mapped encrypted again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * Otherwise the running kernel will see strange cache effects when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * trying to use that page.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (set_page_encrypted((unsigned long)&boot_ghcb_page))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) error("Can't map GHCB page encrypted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * GHCB page is mapped encrypted again and flushed from the cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * Mark it non-present now to catch bugs when #VC exceptions trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * after this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (set_page_non_present((unsigned long)&boot_ghcb_page))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) error("Can't unmap GHCB page");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) bool sev_es_check_ghcb_fault(unsigned long address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Check whether the fault was on the GHCB page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ((address & PAGE_MASK) == (unsigned long)&boot_ghcb_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct es_em_ctxt ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) enum es_result result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (!boot_ghcb && !early_setup_sev_es())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) vc_ghcb_invalidate(boot_ghcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) result = vc_init_em_ctxt(&ctxt, regs, exit_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (result != ES_OK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) goto finish;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) switch (exit_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) case SVM_EXIT_RDTSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) case SVM_EXIT_RDTSCP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) result = vc_handle_rdtsc(boot_ghcb, &ctxt, exit_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) case SVM_EXIT_IOIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) result = vc_handle_ioio(boot_ghcb, &ctxt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case SVM_EXIT_CPUID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) result = vc_handle_cpuid(boot_ghcb, &ctxt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) result = ES_UNSUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) finish:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (result == ES_OK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) vc_finish_insn(&ctxt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) } else if (result != ES_RETRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * For now, just halt the machine. That makes debugging easier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * later we just call sev_es_terminate() here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) while (true)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) asm volatile("hlt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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