^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * hibernate_asm.S: Hibernaton support specific for sparc64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/cpudata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ENTRY(swsusp_arch_suspend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) save %sp, -128, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) save %sp, -128, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) flushw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) setuw saved_context, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Save window regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) rdpr %cwp, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) stx %g2, [%g3 + SC_REG_CWP]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) rdpr %wstate, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) stx %g2, [%g3 + SC_REG_WSTATE]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) stx %fp, [%g3 + SC_REG_FP]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Save state regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) rdpr %tick, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) stx %g2, [%g3 + SC_REG_TICK]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) rdpr %pstate, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) stx %g2, [%g3 + SC_REG_PSTATE]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Save global regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) stx %g4, [%g3 + SC_REG_G4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) stx %g5, [%g3 + SC_REG_G5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) stx %g6, [%g3 + SC_REG_G6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) call swsusp_save
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) mov %o0, %i0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) mov %o0, %i0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ENTRY(swsusp_arch_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Write restore_pblist to %l0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) sethi %hi(restore_pblist), %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ldx [%l0 + %lo(restore_pblist)], %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) call __flush_tlb_all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Write PAGE_OFFSET to %g7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) sethi %hi(PAGE_OFFSET), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ldx [%g7 + %lo(PAGE_OFFSET)], %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) setuw (PAGE_SIZE-8), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Use MMU Bypass */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) rd %asi, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) wr %g0, ASI_PHYS_USE_EC, %asi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ba fill_itlb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pbe_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) cmp %l0, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) be restore_ctx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) sub %l0, %g7, %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ldxa [%l0 ] %asi, %l1 /* address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ldxa [%l0 + 8] %asi, %l2 /* orig_address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* phys addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) sub %l1, %g7, %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) sub %l2, %g7, %l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) mov %g3, %l3 /* PAGE_SIZE-8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) copy_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) stxa %g2, [%l2 + %l3] ASI_PHYS_USE_EC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) cmp %l3, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) bne copy_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) sub %l3, 8, %l3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* next pbe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ba pbe_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ldxa [%l0 + 16] %asi, %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) restore_ctx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) setuw saved_context, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Restore window regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) wrpr %g0, 0, %canrestore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) wrpr %g0, 0, %otherwin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) wrpr %g0, 6, %cansave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) wrpr %g0, 0, %cleanwin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ldxa [%g3 + SC_REG_CWP] %asi, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) wrpr %g2, %cwp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ldxa [%g3 + SC_REG_WSTATE] %asi, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) wrpr %g2, %wstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ldxa [%g3 + SC_REG_FP] %asi, %fp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Restore state regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ldxa [%g3 + SC_REG_PSTATE] %asi, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) wrpr %g2, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ldxa [%g3 + SC_REG_TICK] %asi, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) wrpr %g2, %tick
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Restore global regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ldxa [%g3 + SC_REG_G4] %asi, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ldxa [%g3 + SC_REG_G5] %asi, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ldxa [%g3 + SC_REG_G6] %asi, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) wr %g1, %g0, %asi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) wrpr %g0, 14, %pil
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) mov %g0, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) fill_itlb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ba pbe_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) wrpr %g0, 15, %pil