^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ultra.S: Don't expand these all over the place...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1997, 2000, 2008 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/spitfire.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/pil.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/head.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/hypervisor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/cpudata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Basically, most of the Spitfire vs. Cheetah madness
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * has to do with the fact that Cheetah does not support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * IMMU flushes out of the secondary context. Someone needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * to throw a south lake birthday party for the folks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * in Microelectronics who refused to fix this shit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* This file is meant to be read efficiently by the CPU, not humans.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Staraj sie tego nikomu nie pierdolnac...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .globl __flush_tlb_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __flush_tlb_mm: /* 19 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* %o0=(ctx & TAG_CONTEXT_BITS), %o1=SECONDARY_CONTEXT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ldxa [%o1] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) cmp %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bne,pn %icc, __spitfire_flush_tlb_mm_slow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) mov 0x50, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) stxa %g0, [%g3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) stxa %g0, [%g3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) sethi %hi(KERNBASE), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) flush %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .globl __flush_tlb_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) __flush_tlb_page: /* 22 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* %o0 = context, %o1 = vaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) rdpr %pstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) andn %g7, PSTATE_IE, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) wrpr %g2, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) mov SECONDARY_CONTEXT, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ldxa [%o4] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) stxa %o0, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) andcc %o1, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) andn %o1, 1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) be,pn %icc, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) or %o3, 0x10, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) stxa %g0, [%o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 1: stxa %g0, [%o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) stxa %g2, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) sethi %hi(KERNBASE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) flush %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) wrpr %g7, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .globl __flush_tlb_pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) __flush_tlb_pending: /* 27 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) rdpr %pstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) sllx %o1, 3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) andn %g7, PSTATE_IE, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) wrpr %g2, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) mov SECONDARY_CONTEXT, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ldxa [%o4] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) stxa %o0, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 1: sub %o1, (1 << 3), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ldx [%o2 + %o1], %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) andcc %o3, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) andn %o3, 1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) be,pn %icc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) or %o3, 0x10, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) stxa %g0, [%o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 2: stxa %g0, [%o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) brnz,pt %o1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) stxa %g2, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) sethi %hi(KERNBASE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) flush %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) wrpr %g7, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .globl __flush_tlb_kernel_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) __flush_tlb_kernel_range: /* 31 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* %o0=start, %o1=end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) cmp %o0, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) be,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sub %o1, %o0, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) srlx %o3, 18, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) brnz,pn %o4, __spitfire_flush_tlb_kernel_range_slow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) sethi %hi(PAGE_SIZE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) sub %o3, %o4, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) or %o0, 0x20, %o0 ! Nucleus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 1: stxa %g0, [%o0 + %o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) stxa %g0, [%o0 + %o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) brnz,pt %o3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) sub %o3, %o4, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 2: sethi %hi(KERNBASE), %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) flush %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) __spitfire_flush_tlb_kernel_range_slow:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) mov 63 * 8, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 1: ldxa [%o4] ASI_ITLB_DATA_ACCESS, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) andcc %o3, 0x40, %g0 /* _PAGE_L_4U */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) bne,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) mov TLB_TAG_ACCESS, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) stxa %g0, [%o3] ASI_IMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) stxa %g0, [%o4] ASI_ITLB_DATA_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 2: ldxa [%o4] ASI_DTLB_DATA_ACCESS, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) andcc %o3, 0x40, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) bne,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mov TLB_TAG_ACCESS, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) stxa %g0, [%o3] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) stxa %g0, [%o4] ASI_DTLB_DATA_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 2: sub %o4, 8, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) brgez,pt %o4, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) __spitfire_flush_tlb_mm_slow:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) rdpr %pstate, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) wrpr %g1, PSTATE_IE, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) stxa %o0, [%o1] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) stxa %g0, [%g3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) stxa %g0, [%g3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) flush %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) stxa %g2, [%o1] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) sethi %hi(KERNBASE), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) flush %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) wrpr %g1, 0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * The following code flushes one page_size worth.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .section .kprobes.text, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .globl __flush_icache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) __flush_icache_page: /* %o0 = phys_page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) srlx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) sethi %hi(PAGE_OFFSET), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) sllx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) sethi %hi(PAGE_SIZE), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ldx [%g1 + %lo(PAGE_OFFSET)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) add %o0, %g1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 1: subcc %g2, 32, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) bne,pt %icc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) flush %o0 + %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #if (PAGE_SHIFT != 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #error only page shift of 13 is supported by dcache flush
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define DTAG_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* This routine is Spitfire specific so the hardcoded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * D-cache size and line-size are OK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .align 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .globl __flush_dcache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) __flush_dcache_page: /* %o0=kaddr, %o1=flush_icache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) sethi %hi(PAGE_OFFSET), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ldx [%g1 + %lo(PAGE_OFFSET)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) sub %o0, %g1, %o0 ! physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) srlx %o0, 11, %o0 ! make D-cache TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) sethi %hi(1 << 14), %o2 ! D-cache size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) sub %o2, (1 << 5), %o2 ! D-cache line size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 1: ldxa [%o2] ASI_DCACHE_TAG, %o3 ! load D-cache TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) andcc %o3, DTAG_MASK, %g0 ! Valid?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) be,pn %xcc, 2f ! Nope, branch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) andn %o3, DTAG_MASK, %o3 ! Clear valid bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) cmp %o3, %o0 ! TAG match?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) bne,pt %xcc, 2f ! Nope, branch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) stxa %g0, [%o2] ASI_DCACHE_TAG ! Invalidate TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 2: brnz,pt %o2, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) sub %o2, (1 << 5), %o2 ! D-cache line size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* The I-cache does not snoop local stores so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * better flush that too when necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) brnz,pt %o1, __flush_icache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) sllx %o0, 11, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* Cheetah specific versions, patched at boot time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) __cheetah_flush_tlb_mm: /* 19 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) rdpr %pstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) andn %g7, PSTATE_IE, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) wrpr %g2, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) wrpr %g0, 1, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mov PRIMARY_CONTEXT, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) mov 0x40, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ldxa [%o2] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) sllx %o1, CTX_PGSZ1_NUC_SHIFT, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) or %o0, %o1, %o0 /* Preserve nucleus page size fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) stxa %o0, [%o2] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) stxa %g0, [%g3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) stxa %g0, [%g3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) stxa %g2, [%o2] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) sethi %hi(KERNBASE), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) flush %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) wrpr %g0, 0, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) wrpr %g7, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) __cheetah_flush_tlb_page: /* 22 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* %o0 = context, %o1 = vaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) rdpr %pstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) andn %g7, PSTATE_IE, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) wrpr %g2, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) wrpr %g0, 1, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mov PRIMARY_CONTEXT, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ldxa [%o4] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) or %o0, %o3, %o0 /* Preserve nucleus page size fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) stxa %o0, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) andcc %o1, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) be,pn %icc, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) andn %o1, 1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) stxa %g0, [%o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 1: stxa %g0, [%o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) stxa %g2, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) sethi %hi(KERNBASE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) flush %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) wrpr %g0, 0, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) wrpr %g7, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) __cheetah_flush_tlb_pending: /* 27 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) rdpr %pstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) sllx %o1, 3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) andn %g7, PSTATE_IE, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) wrpr %g2, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) wrpr %g0, 1, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) mov PRIMARY_CONTEXT, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ldxa [%o4] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) or %o0, %o3, %o0 /* Preserve nucleus page size fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) stxa %o0, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 1: sub %o1, (1 << 3), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ldx [%o2 + %o1], %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) andcc %o3, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) be,pn %icc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) andn %o3, 1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) stxa %g0, [%o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 2: stxa %g0, [%o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) brnz,pt %o1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) stxa %g2, [%o4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) sethi %hi(KERNBASE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) flush %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) wrpr %g0, 0, %tl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) wrpr %g7, 0x0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) __cheetah_flush_tlb_kernel_range: /* 31 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* %o0=start, %o1=end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) cmp %o0, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) be,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) sub %o1, %o0, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) srlx %o3, 18, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) brnz,pn %o4, 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) sethi %hi(PAGE_SIZE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) sub %o3, %o4, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) or %o0, 0x20, %o0 ! Nucleus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 1: stxa %g0, [%o0 + %o3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) stxa %g0, [%o0 + %o3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) brnz,pt %o3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) sub %o3, %o4, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 2: sethi %hi(KERNBASE), %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) flush %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 3: mov 0x80, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) stxa %g0, [%o4] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) stxa %g0, [%o4] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) __cheetah_flush_dcache_page: /* 11 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) sethi %hi(PAGE_OFFSET), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ldx [%g1 + %lo(PAGE_OFFSET)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) sub %o0, %g1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) sethi %hi(PAGE_SIZE), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 1: subcc %o4, (1 << 5), %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) stxa %g0, [%o0 + %o4] ASI_DCACHE_INVALIDATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) bne,pt %icc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) retl /* I-cache flush never needed on Cheetah, see callers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* Hypervisor specific versions, patched at boot time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) __hypervisor_tlb_tl0_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) save %sp, -192, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) mov %i0, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) call hypervisor_tlbop_error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) mov %i1, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) __hypervisor_flush_tlb_mm: /* 19 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) mov %o0, %o2 /* ARG2: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) mov 0, %o0 /* ARG0: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mov 0, %o1 /* ARG1: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) mov HV_MMU_ALL, %o3 /* ARG3: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) mov HV_FAST_MMU_DEMAP_CTX, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) brnz,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) mov HV_FAST_MMU_DEMAP_CTX, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 1: sethi %hi(__hypervisor_tlb_tl0_error), %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) jmpl %o5 + %lo(__hypervisor_tlb_tl0_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) __hypervisor_flush_tlb_page: /* 22 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* %o0 = context, %o1 = vaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) mov %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) mov %o1, %o0 /* ARG0: vaddr + IMMU-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) mov %g2, %o1 /* ARG1: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) mov HV_MMU_ALL, %o2 /* ARG2: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) srlx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) sllx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) ta HV_MMU_UNMAP_ADDR_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) brnz,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) mov HV_MMU_UNMAP_ADDR_TRAP, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 1: sethi %hi(__hypervisor_tlb_tl0_error), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) jmpl %o2 + %lo(__hypervisor_tlb_tl0_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) __hypervisor_flush_tlb_pending: /* 27 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) sllx %o1, 3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) mov %o2, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) mov %o0, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 1: sub %g1, (1 << 3), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ldx [%g2 + %g1], %o0 /* ARG0: vaddr + IMMU-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) mov %g3, %o1 /* ARG1: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) mov HV_MMU_ALL, %o2 /* ARG2: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) srlx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) sllx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ta HV_MMU_UNMAP_ADDR_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) brnz,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) mov HV_MMU_UNMAP_ADDR_TRAP, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) brnz,pt %g1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 1: sethi %hi(__hypervisor_tlb_tl0_error), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) jmpl %o2 + %lo(__hypervisor_tlb_tl0_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) __hypervisor_flush_tlb_kernel_range: /* 31 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /* %o0=start, %o1=end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) cmp %o0, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) be,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) sub %o1, %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) srlx %g2, 18, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) brnz,pn %g3, 4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) mov %o0, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) sethi %hi(PAGE_SIZE), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) sub %g2, %g3, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 1: add %g1, %g2, %o0 /* ARG0: virtual address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) mov 0, %o1 /* ARG1: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) mov HV_MMU_ALL, %o2 /* ARG2: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) ta HV_MMU_UNMAP_ADDR_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) brnz,pn %o0, 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) mov HV_MMU_UNMAP_ADDR_TRAP, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) brnz,pt %g2, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) sub %g2, %g3, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 2: retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 3: sethi %hi(__hypervisor_tlb_tl0_error), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) jmpl %o2 + %lo(__hypervisor_tlb_tl0_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 4: mov 0, %o0 /* ARG0: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) mov 0, %o1 /* ARG1: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) mov 0, %o2 /* ARG2: mmu context == nucleus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) mov HV_MMU_ALL, %o3 /* ARG3: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) mov HV_FAST_MMU_DEMAP_CTX, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) brnz,pn %o0, 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) mov HV_FAST_MMU_DEMAP_CTX, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /* XXX Niagara and friends have an 8K cache, so no aliasing is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * XXX possible, but nothing explicit in the Hypervisor API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) * XXX guarantees this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) __hypervisor_flush_dcache_page: /* 2 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) tlb_patch_one:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 1: lduw [%o1], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) stw %g1, [%o0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) flush %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) subcc %o2, 1, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) add %o1, 4, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) bne,pt %icc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) add %o0, 4, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* These are all called by the slaves of a cross call, at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * trap level 1, with interrupts fully disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * Register usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * %g5 mm->context (all tlb flushes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * %g1 address arg 1 (tlb page and range flushes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * %g7 address arg 2 (tlb range flush only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * %g6 scratch 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * %g2 scratch 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * %g3 scratch 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * %g4 scratch 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .globl xcall_flush_tlb_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) xcall_flush_tlb_mm: /* 24 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) mov PRIMARY_CONTEXT, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) ldxa [%g2] ASI_DMMU, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) srlx %g3, CTX_PGSZ1_NUC_SHIFT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) or %g5, %g4, %g5 /* Preserve nucleus page size fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) stxa %g5, [%g2] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) mov 0x40, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) stxa %g0, [%g4] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) stxa %g0, [%g4] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) stxa %g3, [%g2] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .globl xcall_flush_tlb_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) xcall_flush_tlb_page: /* 20 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* %g5=context, %g1=vaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) mov PRIMARY_CONTEXT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ldxa [%g4] ASI_DMMU, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) or %g5, %g4, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) mov PRIMARY_CONTEXT, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) stxa %g5, [%g4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) andcc %g1, 0x1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) be,pn %icc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) andn %g1, 0x1, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) stxa %g0, [%g5] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 2: stxa %g0, [%g5] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) stxa %g2, [%g4] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .globl xcall_flush_tlb_kernel_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) xcall_flush_tlb_kernel_range: /* 44 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) sethi %hi(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) or %g2, %lo(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) andn %g1, %g2, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) andn %g7, %g2, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) sub %g7, %g1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) srlx %g3, 18, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) brnz,pn %g2, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) sethi %hi(PAGE_SIZE), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) sub %g3, %g2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) or %g1, 0x20, %g1 ! Nucleus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 1: stxa %g0, [%g1 + %g3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) stxa %g0, [%g1 + %g3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) brnz,pt %g3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) sub %g3, %g2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 2: mov 63 * 8, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 1: ldxa [%g1] ASI_ITLB_DATA_ACCESS, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) andcc %g2, 0x40, %g0 /* _PAGE_L_4U */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) bne,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) mov TLB_TAG_ACCESS, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) stxa %g0, [%g2] ASI_IMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) stxa %g0, [%g1] ASI_ITLB_DATA_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 2: ldxa [%g1] ASI_DTLB_DATA_ACCESS, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) andcc %g2, 0x40, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) bne,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) mov TLB_TAG_ACCESS, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) stxa %g0, [%g2] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) stxa %g0, [%g1] ASI_DTLB_DATA_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 2: sub %g1, 8, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) brgez,pt %g1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* This runs in a very controlled environment, so we do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * not need to worry about BH races etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .globl xcall_sync_tick
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) xcall_sync_tick:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 661: rdpr %pstate, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) wrpr %g2, PSTATE_IG | PSTATE_AG, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .section .sun4v_2insn_patch, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .word 661b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) rdpr %pil, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) wrpr %g0, PIL_NORMAL_MAX, %pil
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sethi %hi(109f), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) b,pt %xcc, etrap_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 109: or %g7, %lo(109b), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) #ifdef CONFIG_TRACE_IRQFLAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) call trace_hardirqs_off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) call smp_synchronize_tick_client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) b rtrap_xcall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .globl xcall_fetch_glob_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) xcall_fetch_glob_regs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) sethi %hi(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) or %g1, %lo(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) __GET_CPUID(%g2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) sllx %g2, 6, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) add %g1, %g3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) rdpr %tstate, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) stx %g7, [%g1 + GR_SNAP_TSTATE]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) rdpr %tpc, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) stx %g7, [%g1 + GR_SNAP_TPC]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) rdpr %tnpc, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) stx %g7, [%g1 + GR_SNAP_TNPC]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) stx %o7, [%g1 + GR_SNAP_O7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) stx %i7, [%g1 + GR_SNAP_I7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) /* Don't try this at home kids... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) rdpr %cwp, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) sub %g3, 1, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) wrpr %g7, %cwp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) mov %i7, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) wrpr %g3, %cwp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) stx %g7, [%g1 + GR_SNAP_RPC]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) sethi %hi(trap_block), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) or %g7, %lo(trap_block), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) sllx %g2, TRAP_BLOCK_SZ_SHIFT, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) add %g7, %g2, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) ldx [%g7 + TRAP_PER_CPU_THREAD], %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) stx %g3, [%g1 + GR_SNAP_THREAD]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .globl xcall_fetch_glob_pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) xcall_fetch_glob_pmu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) sethi %hi(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) or %g1, %lo(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) __GET_CPUID(%g2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) sllx %g2, 6, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) add %g1, %g3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) rd %pic, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) stx %g7, [%g1 + (4 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) rd %pcr, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) stx %g7, [%g1 + (0 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .globl xcall_fetch_glob_pmu_n4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) xcall_fetch_glob_pmu_n4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) sethi %hi(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) or %g1, %lo(global_cpu_snapshot), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) __GET_CPUID(%g2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) sllx %g2, 6, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) add %g1, %g3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) ldxa [%g0] ASI_PIC, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) stx %g7, [%g1 + (4 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) mov 0x08, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ldxa [%g3] ASI_PIC, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) stx %g7, [%g1 + (5 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) mov 0x10, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) ldxa [%g3] ASI_PIC, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) stx %g7, [%g1 + (6 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) mov 0x18, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) ldxa [%g3] ASI_PIC, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) stx %g7, [%g1 + (7 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) mov %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) mov %o1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) mov %o5, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) mov HV_FAST_VT_GET_PERFREG, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) mov 3, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) stx %o1, [%g1 + (3 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) mov HV_FAST_VT_GET_PERFREG, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) mov 2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) stx %o1, [%g1 + (2 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) mov HV_FAST_VT_GET_PERFREG, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) mov 1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) stx %o1, [%g1 + (1 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) mov HV_FAST_VT_GET_PERFREG, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) mov 0, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) stx %o1, [%g1 + (0 * 8)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) mov %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) mov %g3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) mov %g7, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) __cheetah_xcall_flush_tlb_kernel_range: /* 44 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) sethi %hi(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) or %g2, %lo(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) andn %g1, %g2, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) andn %g7, %g2, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) sub %g7, %g1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) srlx %g3, 18, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) brnz,pn %g2, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) sethi %hi(PAGE_SIZE), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) sub %g3, %g2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) or %g1, 0x20, %g1 ! Nucleus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 1: stxa %g0, [%g1 + %g3] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) stxa %g0, [%g1 + %g3] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) brnz,pt %g3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) sub %g3, %g2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 2: mov 0x80, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) stxa %g0, [%g2] ASI_DMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) stxa %g0, [%g2] ASI_IMMU_DEMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) .align 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .globl xcall_flush_dcache_page_cheetah
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) xcall_flush_dcache_page_cheetah: /* %g1 == physical page address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) sethi %hi(PAGE_SIZE), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) 1: subcc %g3, (1 << 5), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) stxa %g0, [%g1 + %g3] ASI_DCACHE_INVALIDATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) bne,pt %icc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .globl xcall_flush_dcache_page_spitfire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) xcall_flush_dcache_page_spitfire: /* %g1 == physical page address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) %g7 == kernel page virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) %g5 == (page->mapping != NULL) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) srlx %g1, (13 - 2), %g1 ! Form tag comparitor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) sethi %hi(L1DCACHE_SIZE), %g3 ! D$ size == 16K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) sub %g3, (1 << 5), %g3 ! D$ linesize == 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 1: ldxa [%g3] ASI_DCACHE_TAG, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) andcc %g2, 0x3, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) be,pn %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) andn %g2, 0x3, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) cmp %g2, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) bne,pt %xcc, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) stxa %g0, [%g3] ASI_DCACHE_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 2: cmp %g3, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) bne,pt %xcc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) sub %g3, (1 << 5), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) brz,pn %g5, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) sethi %hi(PAGE_SIZE), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) 1: flush %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) subcc %g3, (1 << 5), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) bne,pt %icc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) add %g7, (1 << 5), %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 2: retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /* %g5: error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * %g6: tlb op
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) __hypervisor_tlb_xcall_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) mov %g5, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) mov %g6, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) ba,pt %xcc, etrap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) rd %pc, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) mov %l4, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) call hypervisor_tlbop_error_xcall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) mov %l5, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ba,a,pt %xcc, rtrap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .globl __hypervisor_xcall_flush_tlb_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) __hypervisor_xcall_flush_tlb_mm: /* 24 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /* %g5=ctx, g1,g2,g3,g4,g7=scratch, %g6=unusable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) mov %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) mov %o1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) mov %o2, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) mov %o3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) mov %o5, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) clr %o0 /* ARG0: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) clr %o1 /* ARG1: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) mov %g5, %o2 /* ARG2: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) mov HV_MMU_ALL, %o3 /* ARG3: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) mov HV_FAST_MMU_DEMAP_CTX, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) mov HV_FAST_MMU_DEMAP_CTX, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) brnz,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) mov %o0, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) mov %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) mov %g3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) mov %g4, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) mov %g1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) mov %g7, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) 1: sethi %hi(__hypervisor_tlb_xcall_error), %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) jmpl %g4 + %lo(__hypervisor_tlb_xcall_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .globl __hypervisor_xcall_flush_tlb_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) __hypervisor_xcall_flush_tlb_page: /* 20 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* %g5=ctx, %g1=vaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) mov %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) mov %o1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) mov %o2, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) mov %g1, %o0 /* ARG0: virtual address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) mov %g5, %o1 /* ARG1: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) mov HV_MMU_ALL, %o2 /* ARG2: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) srlx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) sllx %o0, PAGE_SHIFT, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) ta HV_MMU_UNMAP_ADDR_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) mov HV_MMU_UNMAP_ADDR_TRAP, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) brnz,a,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) mov %o0, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) mov %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) mov %g3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) mov %g4, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) 1: sethi %hi(__hypervisor_tlb_xcall_error), %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) jmpl %g4 + %lo(__hypervisor_tlb_xcall_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .globl __hypervisor_xcall_flush_tlb_kernel_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) __hypervisor_xcall_flush_tlb_kernel_range: /* 44 insns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) /* %g1=start, %g7=end, g2,g3,g4,g5,g6=scratch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) sethi %hi(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) or %g2, %lo(PAGE_SIZE - 1), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) andn %g1, %g2, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) andn %g7, %g2, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) sub %g7, %g1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) srlx %g3, 18, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) add %g2, 1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) sub %g3, %g2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) mov %o0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) mov %o1, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) brnz,pn %g7, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) mov %o2, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) 1: add %g1, %g3, %o0 /* ARG0: virtual address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) mov 0, %o1 /* ARG1: mmu context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) mov HV_MMU_ALL, %o2 /* ARG2: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) ta HV_MMU_UNMAP_ADDR_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) mov HV_MMU_UNMAP_ADDR_TRAP, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) brnz,pn %o0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) mov %o0, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) sethi %hi(PAGE_SIZE), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) brnz,pt %g3, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) sub %g3, %o2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) 5: mov %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) mov %g4, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) mov %g7, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) membar #Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) 1: sethi %hi(__hypervisor_tlb_xcall_error), %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) jmpl %g4 + %lo(__hypervisor_tlb_xcall_error), %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) 2: mov %o3, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) mov %o5, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) mov 0, %o0 /* ARG0: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) mov 0, %o1 /* ARG1: CPU lists unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) mov 0, %o2 /* ARG2: mmu context == nucleus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) mov HV_MMU_ALL, %o3 /* ARG3: flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) mov HV_FAST_MMU_DEMAP_CTX, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) ta HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) mov %g1, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) brz,pt %o0, 5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) mov %g3, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) mov HV_FAST_MMU_DEMAP_CTX, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) ba,pt %xcc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) clr %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /* These just get rescheduled to PIL vectors. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .globl xcall_call_function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) xcall_call_function:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) wr %g0, (1 << PIL_SMP_CALL_FUNC), %set_softint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .globl xcall_call_function_single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) xcall_call_function_single:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) wr %g0, (1 << PIL_SMP_CALL_FUNC_SNGL), %set_softint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .globl xcall_receive_signal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) xcall_receive_signal:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) wr %g0, (1 << PIL_SMP_RECEIVE_SIGNAL), %set_softint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .globl xcall_capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) xcall_capture:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) wr %g0, (1 << PIL_SMP_CAPTURE), %set_softint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) #ifdef CONFIG_KGDB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .globl xcall_kgdb_capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) xcall_kgdb_capture:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) wr %g0, (1 << PIL_KGDB_CAPTURE), %set_softint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .globl cheetah_patch_cachetlbops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) cheetah_patch_cachetlbops:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) save %sp, -128, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) sethi %hi(__flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) or %o0, %lo(__flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) sethi %hi(__cheetah_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) or %o1, %lo(__cheetah_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) mov 19, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) sethi %hi(__flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) or %o0, %lo(__flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) sethi %hi(__cheetah_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) or %o1, %lo(__cheetah_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) mov 22, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) sethi %hi(__flush_tlb_pending), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) or %o0, %lo(__flush_tlb_pending), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) sethi %hi(__cheetah_flush_tlb_pending), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) or %o1, %lo(__cheetah_flush_tlb_pending), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) mov 27, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) sethi %hi(__flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) or %o0, %lo(__flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) sethi %hi(__cheetah_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) or %o1, %lo(__cheetah_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) mov 31, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) sethi %hi(__flush_dcache_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) or %o0, %lo(__flush_dcache_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) sethi %hi(__cheetah_flush_dcache_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) or %o1, %lo(__cheetah_flush_dcache_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) mov 11, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) sethi %hi(xcall_flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) or %o0, %lo(xcall_flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) sethi %hi(__cheetah_xcall_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) or %o1, %lo(__cheetah_xcall_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) mov 44, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) .globl hypervisor_patch_cachetlbops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) hypervisor_patch_cachetlbops:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) save %sp, -128, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) sethi %hi(__flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) or %o0, %lo(__flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) sethi %hi(__hypervisor_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) or %o1, %lo(__hypervisor_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) mov 19, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) sethi %hi(__flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) or %o0, %lo(__flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) sethi %hi(__hypervisor_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) or %o1, %lo(__hypervisor_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) mov 22, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) sethi %hi(__flush_tlb_pending), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) or %o0, %lo(__flush_tlb_pending), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) sethi %hi(__hypervisor_flush_tlb_pending), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) or %o1, %lo(__hypervisor_flush_tlb_pending), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) mov 27, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) sethi %hi(__flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) or %o0, %lo(__flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) sethi %hi(__hypervisor_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) or %o1, %lo(__hypervisor_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) mov 31, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) #ifdef DCACHE_ALIASING_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) sethi %hi(__flush_dcache_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) or %o0, %lo(__flush_dcache_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) sethi %hi(__hypervisor_flush_dcache_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) or %o1, %lo(__hypervisor_flush_dcache_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) mov 2, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) #endif /* DCACHE_ALIASING_POSSIBLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) sethi %hi(xcall_flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) or %o0, %lo(xcall_flush_tlb_mm), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) sethi %hi(__hypervisor_xcall_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) or %o1, %lo(__hypervisor_xcall_flush_tlb_mm), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) mov 24, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) sethi %hi(xcall_flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) or %o0, %lo(xcall_flush_tlb_page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) sethi %hi(__hypervisor_xcall_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) or %o1, %lo(__hypervisor_xcall_flush_tlb_page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) mov 20, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) sethi %hi(xcall_flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) or %o0, %lo(xcall_flush_tlb_kernel_range), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) sethi %hi(__hypervisor_xcall_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) or %o1, %lo(__hypervisor_xcall_flush_tlb_kernel_range), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) call tlb_patch_one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) mov 44, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) ret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) restore